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Root/trunk/wbsio_spi.c

1/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2008 Peter Stuge <peter@stuge.se>
5 * Copyright (C) 2009,2010 Carl-Daniel Hailfinger
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#if defined(__i386__) || defined(__x86_64__)
22
23#include "flash.h"
24#include "chipdrivers.h"
25#include "programmer.h"
26#include "hwaccess.h"
27#include "spi.h"
28
29#define WBSIO_PORT10x2e
30#define WBSIO_PORT20x4e
31
32static uint16_t wbsio_spibase = 0;
33
34static uint16_t wbsio_get_spibase(uint16_t port)
35{
36uint8_t id;
37uint16_t flashport = 0;
38
39w836xx_ext_enter(port);
40id = sio_read(port, 0x20);
41if (id != 0xa0) {
42msg_perr("\nW83627 not found at 0x%x, id=0x%02x want=0xa0.\n", port, id);
43goto done;
44}
45
46if (0 == (sio_read(port, 0x24) & 2)) {
47msg_perr("\nW83627 found at 0x%x, but SPI pins are not enabled. (CR[0x24] bit 1=0)\n", port);
48goto done;
49}
50
51sio_write(port, 0x07, 0x06);
52if (0 == (sio_read(port, 0x30) & 1)) {
53msg_perr("\nW83627 found at 0x%x, but SPI is not enabled. (LDN6[0x30] bit 0=0)\n", port);
54goto done;
55}
56
57flashport = (sio_read(port, 0x62) << 8) | sio_read(port, 0x63);
58
59done:
60w836xx_ext_leave(port);
61return flashport;
62}
63
64static int wbsio_spi_send_command(struct flashctx *flash, unsigned int writecnt,
65 unsigned int readcnt,
66 const unsigned char *writearr,
67 unsigned char *readarr);
68static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf,
69 unsigned int start, unsigned int len);
70
71static const struct spi_master spi_master_wbsio = {
72.type = SPI_CONTROLLER_WBSIO,
73.max_data_read = MAX_DATA_UNSPECIFIED,
74.max_data_write = MAX_DATA_UNSPECIFIED,
75.command = wbsio_spi_send_command,
76.multicommand = default_spi_send_multicommand,
77.read = wbsio_spi_read,
78.write_256 = spi_chip_write_1,
79.write_aai = default_spi_write_aai,
80};
81
82int wbsio_check_for_spi(void)
83{
84if (0 == (wbsio_spibase = wbsio_get_spibase(WBSIO_PORT1)))
85if (0 == (wbsio_spibase = wbsio_get_spibase(WBSIO_PORT2)))
86return 1;
87
88msg_pspew("\nwbsio_spibase = 0x%x\n", wbsio_spibase);
89
90msg_pdbg("%s: Winbond saved on 4 register bits so max chip size is "
91 "1024 kB!\n", __func__);
92max_rom_decode.spi = 1024 * 1024;
93register_spi_master(&spi_master_wbsio);
94
95return 0;
96}
97
98/* W83627DHG has 11 command modes:
99 * 1=1 command only
100 * 2=1 command+1 data write
101 * 3=1 command+2 data read
102 * 4=1 command+3 address
103 * 5=1 command+3 address+1 data write
104 * 6=1 command+3 address+4 data write
105 * 7=1 command+3 address+1 dummy address inserted by wbsio+4 data read
106 * 8=1 command+3 address+1 data read
107 * 9=1 command+3 address+2 data read
108 * a=1 command+3 address+3 data read
109 * b=1 command+3 address+4 data read
110 *
111 * mode[7:4] holds the command mode
112 * mode[3:0] holds SPI address bits [19:16]
113 *
114 * The Winbond SPI master only supports 20 bit addresses on the SPI bus. :\
115 * Would one more byte of RAM in the chip (to get all 24 bits) really make
116 * such a big difference?
117 */
118static int wbsio_spi_send_command(struct flashctx *flash, unsigned int writecnt,
119 unsigned int readcnt,
120 const unsigned char *writearr,
121 unsigned char *readarr)
122{
123int i;
124uint8_t mode = 0;
125
126msg_pspew("%s:", __func__);
127
128if (1 == writecnt && 0 == readcnt) {
129mode = 0x10;
130} else if (2 == writecnt && 0 == readcnt) {
131OUTB(writearr[1], wbsio_spibase + 4);
132msg_pspew(" data=0x%02x", writearr[1]);
133mode = 0x20;
134} else if (1 == writecnt && 2 == readcnt) {
135mode = 0x30;
136} else if (4 == writecnt && 0 == readcnt) {
137msg_pspew(" addr=0x%02x", (writearr[1] & 0x0f));
138for (i = 2; i < writecnt; i++) {
139OUTB(writearr[i], wbsio_spibase + i);
140msg_pspew("%02x", writearr[i]);
141}
142mode = 0x40 | (writearr[1] & 0x0f);
143} else if (5 == writecnt && 0 == readcnt) {
144msg_pspew(" addr=0x%02x", (writearr[1] & 0x0f));
145for (i = 2; i < 4; i++) {
146OUTB(writearr[i], wbsio_spibase + i);
147msg_pspew("%02x", writearr[i]);
148}
149OUTB(writearr[i], wbsio_spibase + i);
150msg_pspew(" data=0x%02x", writearr[i]);
151mode = 0x50 | (writearr[1] & 0x0f);
152} else if (8 == writecnt && 0 == readcnt) {
153msg_pspew(" addr=0x%02x", (writearr[1] & 0x0f));
154for (i = 2; i < 4; i++) {
155OUTB(writearr[i], wbsio_spibase + i);
156msg_pspew("%02x", writearr[i]);
157}
158msg_pspew(" data=0x");
159for (; i < writecnt; i++) {
160OUTB(writearr[i], wbsio_spibase + i);
161msg_pspew("%02x", writearr[i]);
162}
163mode = 0x60 | (writearr[1] & 0x0f);
164} else if (5 == writecnt && 4 == readcnt) {
165/* XXX: TODO not supported by flashrom infrastructure!
166 * This mode, 7, discards the fifth byte in writecnt,
167 * but since we can not express that in flashrom, fail
168 * the operation for now.
169 */
170;
171} else if (4 == writecnt && readcnt >= 1 && readcnt <= 4) {
172msg_pspew(" addr=0x%02x", (writearr[1] & 0x0f));
173for (i = 2; i < writecnt; i++) {
174OUTB(writearr[i], wbsio_spibase + i);
175msg_pspew("%02x", writearr[i]);
176}
177mode = ((7 + readcnt) << 4) | (writearr[1] & 0x0f);
178}
179msg_pspew(" cmd=%02x mode=%02x\n", writearr[0], mode);
180
181if (!mode) {
182msg_perr("%s: unsupported command type wr=%d rd=%d\n",
183__func__, writecnt, readcnt);
184/* Command type refers to the number of bytes read/written. */
185return SPI_INVALID_LENGTH;
186}
187
188OUTB(writearr[0], wbsio_spibase);
189OUTB(mode, wbsio_spibase + 1);
190programmer_delay(10);
191
192if (!readcnt)
193return 0;
194
195msg_pspew("%s: returning data =", __func__);
196for (i = 0; i < readcnt; i++) {
197readarr[i] = INB(wbsio_spibase + 4 + i);
198msg_pspew(" 0x%02x", readarr[i]);
199}
200msg_pspew("\n");
201return 0;
202}
203
204static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf,
205 unsigned int start, unsigned int len)
206{
207mmio_readn((void *)(flash->virtual_memory + start), buf, len);
208return 0;
209}
210
211#endif

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