flashrom 

flashrom Svn Source Tree

Root/trunk/flashchips.h

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
1/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2000 Ronald G. Minnich <rminnich@gmail.com>
6 * Copyright (C) 2005-2007 coresystems GmbH <stepan@coresystems.de>
7 * Copyright (C) 2006-2009 Carl-Daniel Hailfinger
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 */
23
24#ifndef __FLASHCHIPS_H__
25#define __FLASHCHIPS_H__ 1
26
27/*
28 * Please keep this list sorted alphabetically by manufacturer. The first
29 * entry of each section should be the manufacturer ID, followed by the
30 * list of devices from that manufacturer (sorted by device ID).
31 *
32 * Most LPC/FWH parts (parallel flash) have 8-bit device IDs if there is no
33 * continuation code.
34 * SPI parts have at least 16-bit device IDs if they support RDID.
35 */
36
37#define GENERIC_MANUF_ID0xFFFF/* Check if there is a vendor ID */
38#define GENERIC_DEVICE_ID0xFFFF/* Only match the vendor ID */
39#define SFDP_DEVICE_ID0xFFFE
40#define PROGMANUF_ID0xFFFE/* dummy ID for opaque chips behind a programmer */
41#define PROGDEV_ID0x01/* dummy ID for opaque chips behind a programmer */
42
43#define ALLIANCE_ID0x52/* Alliance Semiconductor */
44#define ALLIANCE_AS29F002B0x34
45#define ALLIANCE_AS29F002T0xB0
46#define ALLIANCE_AS29F0100x04
47#define ALLIANCE_AS29F0400xA4
48#define ALLIANCE_AS29F200B0x57
49#define ALLIANCE_AS29F200T0x51
50#define ALLIANCE_AS29LV160B0x49
51#define ALLIANCE_AS29LV160T0xCA
52#define ALLIANCE_AS29LV400B0xBA
53#define ALLIANCE_AS29LV400T0xB9
54#define ALLIANCE_AS29LV800B0x5B
55#define ALLIANCE_AS29LV800T0xDA
56
57#define AMD_ID0x01/* AMD */
58#define AMD_AM29DL400BT0x0C
59#define AMD_AM29DL400BB0x0F
60#define AMD_AM29DL800BT0x4A
61#define AMD_AM29DL800BB0xCB
62#define AMD_AM29F002BB0x34/* Same as Am29F002NBB */
63#define AMD_AM29F002BT0xB0/* Same as Am29F002NBT */
64#define AMD_AM29F004BB0x7B
65#define AMD_AM29F004BT0x77
66#define AMD_AM29F016D0xAD
67#define AMD_AM29F0100x20/* Same as Am29F010A and Am29F010B */
68#define AMD_AM29F0400xA4/* Same as AM29F040B */
69#define AMD_AM29F0800xD5/* Same as Am29F080B */
70#define AMD_AM29F200BB0x57
71#define AMD_AM29F200BT0x51
72#define AMD_AM29F400BB0xAB
73#define AMD_AM29F400BT0x23
74#define AMD_AM29F800BB0x58
75#define AMD_AM29F800BT0xD6
76#define AMD_AM29LV001BB0x6D
77#define AMD_AM29LV001BT0xED
78#define AMD_AM29LV010B0x6E/* 1Mb, uniform */
79#define AMD_AM29LV002BB0xC2
80#define AMD_AM29LV002BT0x40
81#define AMD_AM29LV004BB0xB6
82#define AMD_AM29LV004BT0xB5
83#define AMD_AM29LV008BB0x37
84#define AMD_AM29LV008BT0x3E
85#define AMD_AM29LV040B0x4F
86#define AMD_AM29LV080B0x38/* Same as Am29LV081B */
87#define AMD_AM29LV200BB0xBF
88#define AMD_AM29LV200BT0x3B
89#define AMD_AM29LV800BB0x5B/* Same as Am29LV800DB */
90#define AMD_AM29LV400BT0xB9
91#define AMD_AM29LV400BB0xBA
92#define AMD_AM29LV800BT0xDA/* Same as Am29LV800DT */
93
94#define AMIC_ID0x7F37/* AMIC */
95#define AMIC_ID_NOPREFIX0x37/* AMIC */
96#define AMIC_A25L05PT0x2020
97#define AMIC_A25L05PU0x2010
98#define AMIC_A25L10PT0x2021
99#define AMIC_A25L10PU0x2011
100#define AMIC_A25L20PT0x2022
101#define AMIC_A25L20PU0x2012
102#define AMIC_A25L40PT0x2013/* Datasheet says T and U have
103 same device ID. Confirmed by
104 hardware testing. */
105#define AMIC_A25L40PU0x2013
106#define AMIC_A25L80P0x2014/* Seems that no A25L80PT exists */
107#define AMIC_A25L16PT0x2025
108#define AMIC_A25L16PU0x2015
109#define AMIC_A25L5120x3010
110#define AMIC_A25L0100x3011
111#define AMIC_A25L0200x3012
112#define AMIC_A25L0400x3013
113#define AMIC_A25L0800x3014
114#define AMIC_A25L0160x3015
115#define AMIC_A25L0320x3016
116#define AMIC_A25LQ160x4015
117#define AMIC_A25LQ0320x4016/* Same as A25LQ32A, but the latter supports SFDP */
118#define AMIC_A25LQ640x4017
119#define AMIC_A29002B0x0d
120#define AMIC_A29002T0x8C/* Same as A290021T */
121#define AMIC_A29040B0x86
122#define AMIC_A29400T0xB0/* Same as 294001T */
123#define AMIC_A29400U0x31/* Same as A294001U */
124#define AMIC_A29800T0x0E
125#define AMIC_A29800U0x8F
126#define AMIC_A29L004T0x34/* Same as A29L400T */
127#define AMIC_A29L004U0xB5/* Same as A29L400U */
128#define AMIC_A29L008T0x1A/* Same as A29L800T */
129#define AMIC_A29L008U0x9B/* Same as A29L800U */
130#define AMIC_A29L0400x92
131#define AMIC_A49LF040A0x9d
132
133#define ATMEL_ID0x1F/* Atmel (now used by Adesto) */
134#define ATMEL_AT25DF0210x4300
135#define ATMEL_AT25DF041A0x4401
136#define ATMEL_AT25DF0810x4502/* EDI 0x00. AT25DL081 has same ID + EDI 0x0100 */
137#define ATMEL_AT25DF081A0x4501/* Yes, 81A has a lower number than 81 */
138#define ATMEL_AT25DF1610x4602
139#define ATMEL_AT25DF3210x4700/* Same as 26DF321 */
140#define ATMEL_AT25DF321A0x4701
141#define ATMEL_AT25DF6410x4800
142#define ATMEL_AT25DL1610x4603/* EDI 0x0100 */
143#define ATMEL_AT25DQ1610x8600/* EDI 0x0100 */
144#define ATMEL_AT25DQ3210x8700/* EDI 0x0100 */
145#define ATMEL_AT25F5120x60/* Needs AT25F_RDID. ID from PCN and actual HW. Seems to be a relabeled AT25F1024. */
146#define ATMEL_AT25F512A0x65/* Needs AT25F_RDID */
147#define ATMEL_AT25F512B0x6500
148#define ATMEL_AT25F10240x60/* Needs AT25F_RDID */
149#define ATMEL_AT25F20480x63/* Needs AT25F_RDID */
150#define ATMEL_AT25F40960x64/* Needs AT25F_RDID */
151#define ATMEL_AT25FS0100x6601
152#define ATMEL_AT25FS0400x6604
153#define ATMEL_AT26DF0410x4400
154#define ATMEL_AT26DF0810x4500/* guessed, no datasheet available */
155#define ATMEL_AT26DF081A0x4501
156#define ATMEL_AT26DF1610x4600
157#define ATMEL_AT26DF161A0x4601
158#define ATMEL_AT26DF3210x4700/* Same as 25DF321 */
159#define ATMEL_AT26F0040x0400
160#define ATMEL_AT29LV5120x3D
161#define ATMEL_AT29LV010A0x35/* Same as AT29BV010A, the latter works down to 2.7V */
162#define ATMEL_AT29LV0200xBA
163#define ATMEL_AT29BV040A0xC4
164#define ATMEL_AT29C040A0xA4
165#define ATMEL_AT29C010A0xD5
166#define ATMEL_AT29C0200xDA
167#define ATMEL_AT29C5120x5D
168#define ATMEL_AT45BR3214B/* No ID available */
169#define ATMEL_AT45CS12820x2920
170#define ATMEL_AT45D011/* No ID available */
171#define ATMEL_AT45D021A/* No ID available */
172#define ATMEL_AT45D041A/* No ID available */
173#define ATMEL_AT45D081A/* No ID available */
174#define ATMEL_AT45D161/* No ID available */
175#define ATMEL_AT45DB011/* No ID (opcode) available for AT45DB011, AT45DB011B */
176#define ATMEL_AT45DB011D0x2200
177#define ATMEL_AT45DB021/* No ID (opcode) available for AT45DB021, AT45DB021A, AT45DB021B */
178#define ATMEL_AT45DB021D0x2300
179#define ATMEL_AT45DB021E/* same as above but with EDI 0x0100 */
180#define ATMEL_AT45DB041/* No ID (opcode) available for AT45DB041, AT45DB041A, AT45DB041B */
181#define ATMEL_AT45DB041D0x2400
182#define ATMEL_AT45DB041E/* same as above but with EDI 0x0100 */
183#define ATMEL_AT45DB081/* No ID (opcode) available for AT45DB081, AT45DB081A, AT45DB081B */
184#define ATMEL_AT45DB081D0x2500
185#define ATMEL_AT45DB081E/* same as above but with EDI 0x0100 */
186#define ATMEL_AT45DB161/* No ID (opcode) available for AT45DB161, AT45DB161B */
187#define ATMEL_AT45DB161D0x2600
188#define ATMEL_AT45DB161E/* same as above but with EDI 0x0100 */
189#define ATMEL_AT45DB321/* No ID (opcode) available for AT45DB321, AT45DB321B */
190#define ATMEL_AT45DB321C0x2700
191#define ATMEL_AT45DB321E/* same as above but with EDI 0x0100 */
192#define ATMEL_AT45DB321D0x2701 /* Buggy data sheet */
193#define ATMEL_AT45DB642/* No ID (opcode) available for AT45DB642 */
194#define ATMEL_AT45DB642D0x2800
195#define ATMEL_AT49BV5120x03/* Same as AT49F512 */
196#define ATMEL_AT49F001N0x05/* Same as AT49F001 */
197#define ATMEL_AT49F001NT0x04/* Same as AT49F001T */
198#define ATMEL_AT49F002N0x07/* for AT49F002(N) */
199#define ATMEL_AT49LH0020xE9
200#define ATMEL_AT49LH00B40xED
201#define ATMEL_AT49LH0040xEE
202#define ATMEL_AT49F002NT0x08/* for AT49F002(N)T */
203#define ATMEL_AT49F0100x17/* Same as AT49HF010 (some erroneous datasheets say 0x87), AT49BV010, AT49HBV010, AT49HLV010 */
204#define ATMEL_AT49F0200x0B
205#define ATMEL_AT49F0400x13
206#define ATMEL_AT49F0800x23
207#define ATMEL_AT49F080T0x27
208
209/* Bright Microelectronics has the same manufacturer ID as Hyundai... */
210#define BRIGHT_ID0xAD/* Bright Microelectronics */
211#define BRIGHT_BM29F0400x40
212#define BRIGHT_BM29F400B0xAB
213#define BRIGHT_BM29F400T0xAD
214
215#define CATALYST_ID0x31/* Catalyst */
216#define CATALYST_CAT28F5120xB8
217
218#define ESMT_ID0x8C/* Elite Semiconductor Memory Technology (ESMT) / EFST Elite Flash Storage */
219#define ESMT_F25L008A0x2014
220#define ESMT_F25L32PA0x2016
221#define ESMT_F25D08QA0x2534
222#define ESMT_F25L16QA2S0x4015
223#define ESMT_F25L32QA0x4016
224#define ESMT_F25L32QA2S0x4116
225#define ESMT_F25L64QA0x4117
226#define ESMT_F25L128QA0x4118
227#define ESMT_F49B002UA0x00
228
229/*
230 * EN25 chips are SPI, first byte of device ID is memory type,
231 * second byte of device ID is log(bitsize)-9.
232 * Vendor and device ID of EN29 series are both prefixed with 0x7F, which
233 * is the continuation code for IDs in bank 2.
234 * Vendor ID of EN25 series is NOT prefixed with 0x7F, this results in
235 * a collision with Mitsubishi. Mitsubishi once manufactured flash chips.
236 * Let's hope they are not manufacturing SPI flash chips as well.
237 */
238#define EON_ID0x7F1C/* EON Silicon Devices */
239#define EON_ID_NOPREFIX0x1C/* EON, missing 0x7F prefix */
240#define EON_EN25B050x2010/* Same as EN25P05, can be distinguished by RES/REMS: */
241#define EON_EN25P050x05
242#define EON_EN25B05T0x25
243#define EON_EN25B05B0x95
244#define EON_EN25B100x2011/* Same as EN25P10, can be distinguished by RES/REMS: */
245#define EON_EN25P100x10
246#define EON_EN25B10T0x40
247#define EON_EN25B10B0x30
248#define EON_EN25B200x2012/* Same as EN25P20, can be distinguished by RES/REMS: */
249#define EON_EN25P200x11
250#define EON_EN25B20T0x41
251#define EON_EN25B20B0x31
252#define EON_EN25B400x2013/* Same as EN25P40, can be distinguished by RES/REMS: */
253#define EON_EN25P400x12
254#define EON_EN25B40T0x42
255#define EON_EN25B40B0x32
256#define EON_EN25B800x2014/* Same as EN25P80, can be distinguished by RES/REMS: */
257#define EON_EN25P800x13
258#define EON_EN25B80T0x43
259#define EON_EN25B80B0x33
260#define EON_EN25B160x2015/* Same as EN25P16, can be distinguished by RES/REMS: */
261#define EON_EN25P160x14
262#define EON_EN25B16T0x44
263#define EON_EN25B16B0x34
264#define EON_EN25B320x2016/* Same as EN25P32, can be distinguished by RES/REMS: */
265#define EON_EN25P320x15
266#define EON_EN25B32T0x45
267#define EON_EN25B32B0x35
268#define EON_EN25B640x2017/* Same as EN25P64, can be distinguished by RES/REMS: */
269#define EON_EN25P640x16
270#define EON_EN25B64T0x46
271#define EON_EN25B64B0x36
272#define EON_EN25F050x3110
273#define EON_EN25F100x3111
274#define EON_EN25F200x3112
275#define EON_EN25F400x3113
276#define EON_EN25F800x3114
277#define EON_EN25F160x3115
278#define EON_EN25F320x3116
279#define EON_EN25F640x3117
280#define EON_EN25Q400x3013
281#define EON_EN25Q800x3014
282#define EON_EN25Q160x3015/* Same as EN25D16 */
283#define EON_EN25Q320x3016/* Same as EN25Q32A and EN25Q32B */
284#define EON_EN25Q640x3017
285#define EON_EN25Q1280x3018
286#define EON_EN25QH160x7015
287#define EON_EN25QH320x7016
288#define EON_EN25QH640x7017
289#define EON_EN25QH1280x7018
290#define EON_EN25QH2560x7019
291#define EON_EN25S100x3811
292#define EON_EN25S200x3812
293#define EON_EN25S400x3813
294#define EON_EN25S800x3814
295#define EON_EN25S160x3815
296#define EON_EN25S320x3816
297#define EON_EN25S640x3817
298#define EON_EN25T800x5114
299#define EON_EN25T160x5115
300#define EON_EN29F5120x7F21
301#define EON_EN29F0100x20
302#define EON_EN29F040A0x7F04
303#define EON_EN29LV0100x7F6E
304#define EON_EN29LV0400x4F/* Same as EN29LV040A */
305#define EON_EN29LV640B0xCB
306#define EON_EN29LV640T0xC9
307#define EON_EN29LV640U0x7E
308#define EON_EN29F002T0x7F92/* Same as EN29F002A */
309#define EON_EN29F002B0x7F97/* Same as EN29F002AN */
310#define EON_EN29GL064HL0x7E0C01/* Uniform Sectors, WP protects Top OR Bottom sector */
311#define EON_EN29GL064T0x7E1001/* Same ID as EN29GL064AT */
312#define EON_EN29GL064B0x7E1000/* Same ID as EN29GL064AB */
313#define EON_EN29GL128HL0x7F2101/* Uniform Sectors, WP protects Top OR Bottom sector */
314#define EON_EN29GL256HL0x7F2201/* Uniform Sectors, WP protects Top OR Bottom sector */
315
316#define EXCEL_ID0x7F7F7F7F4A/* Excel Semiconductor Inc. (ESI) resides in bank 5 */
317#define EXCEL_ID_NOPREFIX0x4A/* ESI, missing 0x7F prefix */
318#define EXCEL_ES25P400x2013
319#define EXCEL_ES25P800x2014
320#define EXCEL_ES25P160x2015
321
322#define FIDELIX_ID0xF8/* Fidelix */
323#define FIDELIX_FM25M160x4215
324#define FIDELIX_FM25M320x4216
325#define FIDELIX_FM25M640x4217
326#define FIDELIX_FM25Q080x3214
327#define FIDELIX_FM25Q160x3215/* Same as FM25S16 (which is apparently single I/O only) */
328#define FIDELIX_FM25Q320x3216
329#define FIDELIX_FM25Q640x3217
330
331#define FUJITSU_ID0x04/* Fujitsu */
332#define FUJITSU_MBM29DL400BC0x0F
333#define FUJITSU_MBM29DL400TC0x0C
334#define FUJITSU_MBM29DL800BA0xCB
335#define FUJITSU_MBM29DL800TA0x4A
336#define FUJITSU_MBM29F002BC0x34
337#define FUJITSU_MBM29F002TC0xB0
338#define FUJITSU_MBM29F004BC0x7B
339#define FUJITSU_MBM29F004TC0x77
340#define FUJITSU_MBM29F040C0xA4
341#define FUJITSU_MBM29F080A0xD5
342#define FUJITSU_MBM29F200BC0x57
343#define FUJITSU_MBM29F200TC0x51
344#define FUJITSU_MBM29F400BC0xAB
345#define FUJITSU_MBM29F400TC0x23
346#define FUJITSU_MBM29F800BA0x58
347#define FUJITSU_MBM29F800TA0xD6
348#define FUJITSU_MBM29LV002BC0xC2
349#define FUJITSU_MBM29LV002TC0x40
350#define FUJITSU_MBM29LV004BC0xB6
351#define FUJITSU_MBM29LV004TC0xB5
352#define FUJITSU_MBM29LV008BA0x37
353#define FUJITSU_MBM29LV008TA0x3E
354#define FUJITSU_MBM29LV080A0x38
355#define FUJITSU_MBM29LV200BC0xBF
356#define FUJITSU_MBM29LV200TC0x3B
357#define FUJITSU_MBM29LV400BC0xBA
358#define FUJITSU_MBM29LV400TC0xB9
359#define FUJITSU_MBM29LV800BA0x5B/* Same as MBM29LV800BE */
360#define FUJITSU_MBM29LV800TA0xDA/* Same as MBM29LV800TE */
361#define FUJITSU_MBM29LV160BE0x49/* 16 b mode 0x2249 */
362#define FUJITSU_MBM29LV160TE0xC4/* 16 b mode 0x22C4 */
363
364#define GIGADEVICE_ID0xC8/* GigaDevice */
365#define GIGADEVICE_GD25T800x3114
366#define GIGADEVICE_GD25Q5120x4010
367#define GIGADEVICE_GD25Q100x4011
368#define GIGADEVICE_GD25Q200x4012/* Same as GD25QB */
369#define GIGADEVICE_GD25Q400x4013/* Same as GD25QB */
370#define GIGADEVICE_GD25Q800x4014/* Same as GD25Q80B (which has OTP) */
371#define GIGADEVICE_GD25Q160x4015/* Same as GD25Q16B (which has OTP) */
372#define GIGADEVICE_GD25Q320x4016/* Same as GD25Q32B */
373#define GIGADEVICE_GD25Q640x4017/* Same as GD25Q64B */
374#define GIGADEVICE_GD25Q1280x4018/* GD25Q128B and GD25Q128C only, can be distinguished by SFDP */
375#define GIGADEVICE_GD25VQ21B0x4212
376#define GIGADEVICE_GD25VQ41B0x4213 /* Same as GD25VQ40C, can be distinguished by SFDP */
377#define GIGADEVICE_GD25VQ80C0x4214
378#define GIGADEVICE_GD25VQ16C0x4215
379#define GIGADEVICE_GD25LQ400x6013
380#define GIGADEVICE_GD25LQ800x6014
381#define GIGADEVICE_GD25LQ160x6015
382#define GIGADEVICE_GD25LQ320x6016
383#define GIGADEVICE_GD25LQ640x6017/* Same as GD25LQ64B (which is faster) */
384#define GIGADEVICE_GD25LQ1280x6018
385#define GIGADEVICE_GD29GL064CAB0x7E0601
386
387#define HYUNDAI_ID0xAD/* Hyundai */
388#define HYUNDAI_HY29F400T0x23/* Same as HY29F400AT */
389#define HYUNDAI_HY29F800B0x58/* Same as HY29F800AB */
390#define HYUNDAI_HY29LV800B0x5B
391#define HYUNDAI_HY29F040A0xA4
392#define HYUNDAI_HY29F400B0xAB/* Same as HY29F400AB */
393#define HYUNDAI_HY29F002B0x34
394#define HYUNDAI_HY29F002T0xB0
395#define HYUNDAI_HY29LV400T0xB9
396#define HYUNDAI_HY29LV400B0xBA
397#define HYUNDAI_HY29F0800xD5
398#define HYUNDAI_HY29F800T0xD6/* Same as HY29F800AT */
399#define HYUNDAI_HY29LV800T0xDA
400
401#define IMT_ID0x7F1F/* Integrated Memory Technologies */
402#define IMT_IM29F004B0xAE
403#define IMT_IM29F004T0xAF
404
405#define INTEL_ID0x89/* Intel */
406#define INTEL_28F320J50x14
407#define INTEL_28F640J50x15
408#define INTEL_28F320J30x16
409#define INTEL_28F640J30x17
410#define INTEL_28F128J30x18
411#define INTEL_28F256J30x1D
412#define INTEL_28F400T0x70/* 28F400BV/BX/CE/CV-T */
413#define INTEL_28F400B0x71/* 28F400BV/BX/CE/CV-B */
414#define INTEL_28F200T0x74/* 28F200BL/BV/BX/CV-T */
415#define INTEL_28F200B0x75/* 28F200BL/BV/BX/CV-B */
416#define INTEL_28F004T0x78/* 28F004B5/BE/BV/BX-T */
417#define INTEL_28F004B0x79/* 28F004B5/BE/BV/BX-B */
418#define INTEL_28F002T0x7C/* 28F002BC/BL/BV/BX-T */
419#define INTEL_28F002B0x7D/* 28F002BL/BV/BX-B */
420#define INTEL_28F001T0x94/* 28F001BN/BX-T */
421#define INTEL_28F001B0x95/* 28F001BN/BX-B */
422#define INTEL_28F008T0x98/* 28F008BE/BV-T */
423#define INTEL_28F008B0x99/* 28F008BE/BV-B */
424#define INTEL_28F800T0x9C/* 28F800B5/BV/CE/CV-T */
425#define INTEL_28F800B0x9D/* 28F800B5/BV/CE/CV-B */
426#define INTEL_28F016SV0xA0/* 28F016SA/SV */
427#define INTEL_28F008SA0xA2
428#define INTEL_28F008S30xA6/* 28F008S3/S5/SC */
429#define INTEL_28F004S30xA7/* 28F008S3/S5/SC */
430#define INTEL_28F016XS0xA8
431#define INTEL_28F016S30xAA/* 28F016S3/S5/SC */
432#define INTEL_82802AC0xAC
433#define INTEL_82802AB0xAD
434#define INTEL_28F0100xB4
435#define INTEL_28F5120xB8
436#define INTEL_28F256A0xB9
437#define INTEL_28F0200xBD
438#define INTEL_28F016B3T0xD0/* 28F016B3-T */
439#define INTEL_28F016B3B0xD1/* 28F016B3-B */
440#define INTEL_28F008B3T0xD2/* 28F008B3-T */
441#define INTEL_28F008B3B0xD3/* 28F008B3-B */
442#define INTEL_28F004B3T0xD4/* 28F004B3-T */
443#define INTEL_28F004B3B0xD5/* 28F004B3-B */
444#define INTEL_25F160S33B80x8911/* Same as 25F016S33B8 */
445#define INTEL_25F320S33B80x8912
446#define INTEL_25F640S33B80x8913
447#define INTEL_25F160S33T80x8915/* Same as 25F016S33T8 */
448#define INTEL_25F320S33T80x8916
449#define INTEL_25F640S33T80x8917
450
451#define SHARP_LH28F008SA0xA2/* Sharp chip, Intel Vendor ID */
452#define SHARP_LH28F008SC0xA6/* Sharp chip, Intel Vendor ID */
453
454#define ISSI_ID0xD5/* ISSI Integrated Silicon Solutions, see also PMC. */
455#define ISSI_PMC_IS29GL032B0xF9
456#define ISSI_PMC_IS29GL032T0xF6
457#define ISSI_PMC_IS29GL064B0x7E1000
458#define ISSI_PMC_IS29GL064T0x7E1001
459#define ISSI_PMC_IS29GL064HL0x7E0C01
460#define ISSI_PMC_IS29GL128HL0x7E2101
461#define ISSI_PMC_IS29GL256HL0x7E2201
462
463#define MACRONIX_ID0xC2/* Macronix (MX) */
464/* Mask ROMs */
465#define MACRONIX_MX23L16540x0515
466#define MACRONIX_MX23L32540x0516
467#define MACRONIX_MX23L64540x0517
468#define MACRONIX_MX23L128540x0518
469/* MX25 chips are SPI, first byte of device ID is memory type,
470 * second byte of device ID is log(bitsize)-9.
471 * Generalplus SPI chips seem to be compatible with Macronix
472 * and use the same set of IDs. */
473#define MACRONIX_MX25L5120x2010/* Same as MX25L512E, MX25V512, MX25V512C */
474#define MACRONIX_MX25L10050x2011/* Same as MX25L1005C, MX25L1006E */
475#define MACRONIX_MX25L20050x2012/* Same as MX25L2005C, MX25L2006E */
476#define MACRONIX_MX25L40050x2013/* Same as MX25L4005A, MX25L4005C, MX25L4006E */
477#define MACRONIX_MX25L80050x2014/* Same as MX25V8005, MX25L8006E, MX25L8008E, FIXME: MX25L8073E (4k 0x20) */
478#define MACRONIX_MX25L16050x2015/* MX25L1605 (64k 0x20); MX25L1605A/MX25L1606E/MX25L1608E (4k 0x20, 64k 0x52); MX25L1605D/MX25L1608D/MX25L1673E (4k 0x20) */
479#define MACRONIX_MX25L32050x2016/* MX25L3205, MX25L3205A (64k 0x20); MX25L3205D/MX25L3208D (4k 0x20); MX25L3206E/MX25L3208E (4k 0x20, 64k 0x52); MX25L3273E (4k 0x20, 32k 0x52) */
480#define MACRONIX_MX25L64050x2017/* MX25L6405, MX25L6405D (64k 0x20); MX25L6406E/MX25L6408E (4k 0x20); MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E (4k 0x20, 32k 0x52) */
481#define MACRONIX_MX25L12805D0x2018/* MX25L12805D (no 32k); MX25L12865E, MX25L12835F, MX25L12845E (32k 0x52) */
482#define MACRONIX_MX25L25635F0x2019/* Same as MX25L25639F, but the latter seems to not support REMS */
483#define MACRONIX_MX25L1635D0x2415
484#define MACRONIX_MX25L1635E0x2515/* MX25L1635{E} */
485#define MACRONIX_MX25U1635E0x2535
486#define MACRONIX_MX25U3235E0x2536/* Same as MX25U6435F */
487#define MACRONIX_MX25U6435E0x2537/* Same as MX25U6435F */
488#define MACRONIX_MX25U12835E0x2538/* Same as MX25U12835F */
489#define MACRONIX_MX25U25635F0x2539
490#define MACRONIX_MX25L3235D0x5E16/* MX25L3225D/MX25L3235D/MX25L3237D */
491#define MACRONIX_MX25L6495F0x9517
492
493#define MACRONIX_MX29F001B0x19
494#define MACRONIX_MX29F001T0x18
495#define MACRONIX_MX29F002B0x34/* Same as MX29F002NB; N has reset pin n/c. */
496#define MACRONIX_MX29F002T0xB0/* Same as MX29F002NT; N has reset pin n/c. */
497#define MACRONIX_MX29F004B0x46
498#define MACRONIX_MX29F004T0x45
499#define MACRONIX_MX29F022B0x37/* Same as MX29F022NB */
500#define MACRONIX_MX29F022T0x36/* Same as MX29F022NT */
501#define MACRONIX_MX29F0400xA4/* Same as MX29F040C */
502#define MACRONIX_MX29F0800xD5
503#define MACRONIX_MX29F200B0x57/* Same as MX29F200CB */
504#define MACRONIX_MX29F200T0x51/* Same as MX29F200CT */
505#define MACRONIX_MX29F400B0xAB/* Same as MX29F400CB */
506#define MACRONIX_MX29F400T0x23/* Same as MX29F400CT */
507#define MACRONIX_MX29F800B0x58
508#define MACRONIX_MX29F800T0xD6
509#define MACRONIX_MX29GL320EB0x7E1A00
510#define MACRONIX_MX29GL320ET0x7E1A01
511#define MACRONIX_MX29GL320EHL0x7E1D00
512#define MACRONIX_MX29GL640EB0x7E1000
513#define MACRONIX_MX29GL640ET0x7E1001
514#define MACRONIX_MX29GL640EHL0x7E0C01
515#define MACRONIX_MX29GL128F0x7E2101 /* Same as MX29GL128E */
516#define MACRONIX_MX29GL256F0x7E2201 /* Same as MX29GL256E */
517#define MACRONIX_MX29GL512F0x7E2301
518#define MACRONIX_MX68GL1G0F0x7E2801
519#define MACRONIX_MX29LV002CB0x5A
520#define MACRONIX_MX29LV002CT0x59
521#define MACRONIX_MX29LV004B0xB6/* Same as MX29LV004CB */
522#define MACRONIX_MX29LV004T0xB5/* Same as MX29LV004CT */
523#define MACRONIX_MX29LV008B0x37/* Same as MX29LV008CB */
524#define MACRONIX_MX29LV008T0x3E/* Same as MX29LV008CT */
525#define MACRONIX_MX29LV0400x4F/* Same as MX29LV040C */
526#define MACRONIX_MX29LV0810x38
527#define MACRONIX_MX29LV128DB0x7A
528#define MACRONIX_MX29LV128DT0x7E
529#define MACRONIX_MX29LV160DB0x49/* Same as MX29LV161DB/MX29LV160CB */
530#define MACRONIX_MX29LV160DT0xC4/* Same as MX29LV161DT/MX29LV160CT */
531#define MACRONIX_MX29LV320DB0xA8/* Same as MX29LV321DB */
532#define MACRONIX_MX29LV320DT0xA7/* Same as MX29LV321DT */
533#define MACRONIX_MX29LV400B0xBA/* Same as MX29LV400CB */
534#define MACRONIX_MX29LV400T0xB9/* Same as MX29LV400CT */
535#define MACRONIX_MX29LV640DB0xCB/* Same as MX29LV640EB */
536#define MACRONIX_MX29LV640DT0xC9/* Same as MX29LV640ET */
537#define MACRONIX_MX29LV800B0x5B/* Same as MX29LV800CB */
538#define MACRONIX_MX29LV800T0xDA/* Same as MX29LV800CT */
539#define MACRONIX_MX29SL402CB0xF1
540#define MACRONIX_MX29SL402CT0x70
541#define MACRONIX_MX29SL800CB0x6B/* Same as MX29SL802CB */
542#define MACRONIX_MX29SL800CT0xEA/* Same as MX29SL802CT */
543
544/* Nantronics Semiconductors is listed in JEP106AJ in bank 7, so it should have 6 continuation codes in front
545 * of the manufacturer ID of 0xD5. http://www.nantronicssemi.com */
546#define NANTRONICS_ID0x7F7F7F7F7F7FD5/* Nantronics */
547#define NANTRONICS_ID_NOPREFIX0xD5/* Nantronics, missing prefix */
548#define NANTRONICS_N25S100x3011
549#define NANTRONICS_N25S200x3012
550#define NANTRONICS_N25S400x3013
551#define NANTRONICS_N25S800x3014
552#define NANTRONICS_N25S160x3015
553
554/*
555 * Programmable Micro Corp is listed in JEP106W in bank 2, so it should
556 * have a 0x7F continuation code prefix.
557 * Apparently PMC was renamed to "Chingis Technology Corporation" http://www.chingistek.com which is now a
558 * subsidiary of ISSI. They continue to use the PMC manufacturer ID (instead of ISSI's) nevertheless, even for
559 * new chips with IS* model numbers.
560 */
561#define PMC_ID0x7F9D/* PMC */
562#define PMC_ID_NOPREFIX0x9D/* PMC, missing 0x7F prefix */
563#define PMC_PM25LD256C0x2F
564#define PMC_PM25LD5120x20/* Same as Pm25LD512C, but the latter has more locking options. */
565#define PMC_PM25LD0100x21/* Same as Pm25LD010C, but the latter has more locking options. */
566#define PMC_PM25LD0200x22/* Same as Pm25LD020C, but the latter has more locking options. */
567#define PMC_PM25LQ0200x42
568#define PMC_PM25LQ0400x43
569#define PMC_PM25LQ0800x44
570#define PMC_PM25LQ0160x45
571#define PMC_PM25LQ032C0x46
572#define PMC_PM25LV5120x7B/* Same as Pm25LV512A */
573#define PMC_PM25LV0100x7C/* Same as Pm25LV010A, but the former does not support RDID but RES3 only. */
574#define PMC_PM25LV0200x7D
575#define PMC_PM25LV0400x7E/* Same as PM25LD040(C), but the latter supports more features. */
576#define PMC_PM25LV080B0x13
577#define PMC_PM25LV016B0x14
578#define PMC_PM29F002T0x1D
579#define PMC_PM29F002B0x2D
580#define PMC_PM39LV5120x1B/* Same as IS39LV512 */
581#define PMC_PM39F0100x1C/* Same as Pm39LV010, IS39LV010 */
582#define PMC_PM39LV0200x3D
583#define PMC_PM39LV0400x3E/* Same as IS39LV040 */
584#define PMC_PM39F0200x4D
585#define PMC_PM39F0400x4E
586#define PMC_PM49FL0020x6D
587#define PMC_PM49FL0040x6E
588
589/*
590 * The Sanyo chip found so far uses SPI, first byte is manufacture code,
591 * second byte is the device code,
592 * third byte is a dummy byte.
593 */
594#define SANYO_ID0x62/* Sanyo */
595#define SANYO_LE25FW203A0x1600
596#define SANYO_LE25FW403A0x1100
597#define SANYO_LE25FW1060x15
598#define SANYO_LE25FW4060x07/* RES2 */
599#define SANYO_LE25FW418A0x10/* RES2 and some weird 1 byte RDID variant */
600#define SANYO_LE25FW406A0x1A/* RES2, no datasheet */
601#define SANYO_LE25FU406B0x1E/* LE25FW418A without HD_READ mode option variant */
602#define SANYO_LE25FU406C0x0613/* Also known as LE25U40CMC apparently */
603#define SANYO_LE25FW8060x26/* RES2 and some weird 1 byte RDID variant */
604#define SANYO_LE25FW8080x20/* RES2 and some weird 1 byte RDID variant */
605
606#define SHARP_ID0xB0/* Sharp */
607#define SHARP_LH28F008BJ__PT0xEC
608#define SHARP_LH28F008BJ__PB0xED
609#define SHARP_LH28F800BV__BTL0x4B
610#define SHARP_LH28F800BV__BV0x4D
611#define SHARP_LH28F800BV__TV0x4C
612#define SHARP_LHF00L020xC9/* Same as LHF00L06/LHF00L07 */
613#define SHARP_LHF00L040xCF/* Same as LHF00L03/LHF00L05 */
614
615/* Spansion was previously a joint venture of AMD and Fujitsu. */
616#define SPANSION_ID0x01/* Spansion, same ID as AMD */
617/* S25 chips are SPI. The first device ID byte is memory type and
618 * the second device ID byte is memory capacity. */
619#define SPANSION_S25FL004A0x0212
620#define SPANSION_S25FL008A0x0213
621#define SPANSION_S25FL016A0x0214
622#define SPANSION_S25FL032A0x0215/* Same as S25FL032P, but the latter supports EDI and CFI */
623#define SPANSION_S25FL064A0x0216/* Same as S25FL064P, but the latter supports EDI and CFI */
624#define SPANSION_S25FL1280x2018/* Same ID for various S25FL127S, S25FL128P, S25FL128S and S25FL129P (including dual-die S70FL256P) variants (EDI supported) */
625#define SPANSION_S25FL2560x0219
626#define SPANSION_S25FL5120x0220
627#define SPANSION_S25FL2040x4013
628#define SPANSION_S25FL2080x4014
629#define SPANSION_S25FL2160x4015/* Same as S25FL216K, but the latter supports OTP, 3 status regs, quad I/O, SFDP etc. */
630#define SPANSION_S25FL132K0x4016
631#define SPANSION_S25FL164K0x4017
632
633/* Spansion 29GL families got a suffix indicating the process technology but share the same 3-Byte IDs. They can
634 * however be differentiated by CFI byte 45h. Some versions exist which have special top or bottom boot sectors
635 * and various WP configurations (not heeded in the table below).
636 *
637 * Suf. Process Sector Sz Rd Page Wr Page Data Width OTP Sz Min Size Max Size
638 * A 200 nm 64 kB 8 B 32 B x8/x16 256 B 16Mb/ 2MB 64Mb/ 8MB
639 * M 230 nm 64 kB 8 B 32 B x8/x16 256 B 32Mb/ 4MB 256Mb/ 32MB
640 * N* 110 nm 64 kB 16 B 32 B x8/x16 256 B 32Mb/ 4MB 64Mb/ 8MB
641 * N* 110 nm 128 kB 16 B 32 B x8/x16 256 B 128Mb/16MB 256Mb/ 64MB
642 * P 90 nm 128 kB 16 B 64 B x8/x16 256 B 128Mb/16MB 2Gb/256MB
643 * S 65 nm 128 kB 32 B 512 B x8 only 512 B 128Mb/16MB 2Gb/256MB
644 *
645 * For the N series there are two subgroups: the 4 and 8MB devices (S29GL032N, S29GL064N) have 64 kB erase
646 * sectors while the bigger chips got 128 kB sectors.
647 * Each series includes multiple models varying in speedgrade, boot block configurations etc.
648 */
649#define SPANSION_S29GL016_10xC4/* Top Boot Sector, WP protects Top 2 sectors */
650#define SPANSION_S29GL016_20x49/* Bottom Boot Sector, WP protects Bottom 2 sectors */
651/* Same IDs for S29GL032A, S29GL032M, S29GL032N (variations) */
652#define SPANSION_S29GL032_12890x7E1D00/* Uniform Sectors, WP protects Top OR Bottom sector */
653#define SPANSION_S29GL032_30x7E1A01/* Top Boot Sector, WP protects Top 2 sectors */
654#define SPANSION_S29GL032_40x7E1A00/* Bottom Boot Sector, WP protects Bottom 2 sectors */
655/* Same IDs for S29GL064A, S29GL064M, S29GL064N, S29GL064S (variations) */
656#define SPANSION_S29GL064_12890x7E0C01/* Uniform Sectors, WP protects Top OR Bottom sector */
657#define SPANSION_S29GL064_30x7E1001/* Top Boot Sector, WP protects Top 2 sectors */
658#define SPANSION_S29GL064_40x7E1000/* Bottom Boot Sector, WP protects Bottom 2 sectors */
659#define SPANSION_S29GL064_5670x7E1301/* x16 only, Uniform Sectors */
660
661#define SPANSION_S29GL1280x7E2101/* Same ID for S29GL128M, S29GL128N, S29GL128P, S29GL128S */
662#define SPANSION_S29GL2560x7E2201/* Same ID for S29GL256M, S29GL256N, S29GL256P, S29GL256S */
663#define SPANSION_S29GL5120x7E2301/* Same ID for S29GL512P, S29GL512S */
664#define SPANSION_S29GL01G0x7E2801/* Same ID for S29GL01GP, S29GL01GS */
665#define SPANSION_S70GL02G0x7E4801/* Same ID for S70GL02GP, S70GL02GS; based on two S29GL01G dies respectively */
666
667/*
668 * SST25 chips are SPI, first byte of device ID is memory type, second
669 * byte of device ID is related to log(bitsize) at least for some chips.
670 */
671#define SST_ID0xBF/* SST */
672#define SST_SST25LF020_REMS0x43/* REMS or RES opcode */
673#define SST_SST25WF5120x2501
674#define SST_SST25WF0100x2502
675#define SST_SST25WF0200x2503
676#define SST_SST25WF0400x2504
677#define SST_SST25WF0800x2505
678/* There exist some successors to members of the SST25WF family with alphabetic suffixes. Their datasheets show
679 * a 4 byte long response w/o a vendor ID. The first byte is 0x62 that is actually Sanyo's and might be due to
680 * a collaboration in the mid 2000ies between Sanyo and SST. */
681#define SST_SST25WF020A0x1612
682#define SST_SST25WF040B0x1613
683#define SST_SST25WF080B0x1614
684#define SST_SST25VF512_REMS0x48/* REMS or RES opcode, same as SST25VF512A */
685#define SST_SST25VF010_REMS0x49/* REMS or RES opcode, same as SST25VF010A */
686#define SST_SST25VF020_REMS0x43/* REMS or RES opcode, same as SST25LF020A */
687#define SST_SST25VF020B0x258C
688#define SST_SST25VF040_REMS0x44/* REMS or RES opcode, same as SST25LF040A */
689#define SST_SST25VF040B0x258D
690#define SST_SST25VF040B_REMS0x8D/* REMS or RES opcode */
691#define SST_SST25VF080_REMS0x80/* REMS or RES opcode, same as SST25LF080A */
692#define SST_SST25VF080B0x258E
693#define SST_SST25VF080B_REMS0x8E/* REMS or RES opcode */
694#define SST_SST25VF016B0x2541
695#define SST_SST25VF032B0x254A
696#define SST_SST25VF032B_REMS0x4A/* REMS or RES opcode */
697#define SST_SST25VF064C0x254B
698#define SST_SST26VF0160x2601
699#define SST_SST26VF0320x2602
700#define SST_SST26VF064B0x2643
701#define SST_SST27SF5120xA4
702#define SST_SST27SF0100xA5
703#define SST_SST27SF0200xA6
704#define SST_SST27VF0100xA9
705#define SST_SST27VF0200xAA
706#define SST_SST28SF0400x04
707#define SST_SST29LE5120x3D/* Same as SST29VE512 */
708#define SST_SST29EE5120x5D
709#define SST_SST29EE0100x07
710#define SST_SST29LE0100x08/* Same as SST29VE010 */
711#define SST_SST29EE020A0x10/* Same as SST29EE020 */
712#define SST_SST29LE0200x12/* Same as SST29VE020 */
713#define SST_SST29SF0200x24
714#define SST_SST29VF0200x25
715#define SST_SST29SF0400x13
716#define SST_SST29VF0400x14
717#define SST_SST39SF5120xB4
718#define SST_SST39SF0100xB5
719#define SST_SST39SF0200xB6/* Same as 39SF020A */
720#define SST_SST39SF0400xB7
721#define SST_SST39VF5120xD4
722#define SST_SST39VF0100xD5
723#define SST_SST39VF0200xD6/* Same as 39LF020 */
724#define SST_SST39VF0400xD7/* Same as 39LF040 */
725#define SST_SST39VF0800xD8/* Same as 39LF080/39VF080/39VF088 */
726#define SST_SST45VF5120x41/* REMS, read opcode 0xFF */
727#define SST_SST45LF0100x42/* REMS, read opcode 0xFF, 'funny' other opcodes */
728#define SST_SST45VF0100x45/* REMS, read opcode 0xFF */
729#define SST_SST45VF0200x43/* REMS, read opcode 0xFF */
730#define SST_SST49LF040B0x50
731#define SST_SST49LF0400x51
732#define SST_SST49LF0200x61
733#define SST_SST49LF020A0x52
734#define SST_SST49LF030A0x1C
735#define SST_SST49LF080A0x5B
736#define SST_SST49LF002A0x57
737#define SST_SST49LF003A0x1B
738#define SST_SST49LF004A0x60/* Same as 49LF004B */
739#define SST_SST49LF008A0x5A
740#define SST_SST49LF004C0x54
741#define SST_SST49LF008C0x59
742#define SST_SST49LF016C0x5C
743#define SST_SST49LF160C0x4C
744
745/*
746 * ST25P chips are SPI, first byte of device ID is memory type, second
747 * byte of device ID is related to log(bitsize) at least for some chips.
748 */
749#define ST_ID0x20/* ST / SGS/Thomson / Numonyx (later acquired by Micron) */
750#define ST_M25P05A0x2010
751#define ST_M25P05_RES0x10/* Same code as M25P10. */
752#define ST_M25P10A0x2011
753#define ST_M25P10_RES0x10/* Same code as M25P05. */
754#define ST_M25P200x2012
755#define ST_M25P20_RES0x11
756#define ST_M25P400x2013
757#define ST_M25P40_RES0x12
758#define ST_M25P800x2014
759#define ST_M25P160x2015
760#define ST_M25P320x2016
761#define ST_M25P640x2017
762#define ST_M25P1280x2018
763#define ST_M45PE100x4011
764#define ST_M45PE200x4012
765#define ST_M45PE400x4013
766#define ST_M45PE800x4014
767#define ST_M45PE160x4015
768#define ST_M25PX800x7114
769#define ST_M25PX160x7115
770#define ST_M25PX320x7116
771#define ST_M25PX640x7117
772#define ST_M25PE100x8011
773#define ST_M25PE200x8012
774#define ST_M25PE400x8013
775#define ST_M25PE800x8014
776#define ST_M25PE160x8015
777#define ST_M50FLW040A0x08
778#define ST_M50FLW040B0x28
779#define ST_M50FLW080A0x80
780#define ST_M50FLW080B0x81
781#define ST_M50FW0020x29
782#define ST_M50FW0400x2C
783#define ST_M50FW0800x2D
784#define ST_M50FW0160x2E
785#define ST_M50LPW0800x2F
786#define ST_M50LPW1160x30
787#define ST_M29F002B0x34/* Same as M29F002BB */
788#define ST_M29F002T0xB0/* Same as M29F002BT/M29F002NT/M29F002BNT */
789#define ST_M29F040B0xE2/* Same as M29F040 */
790#define ST_M29F0800xF1
791#define ST_M29F200BT0xD3
792#define ST_M29F200BB0xD4
793#define ST_M29F400BT0xD5/* Same as M29F400T */
794#define ST_M29F400BB0xD6/* Same as M29F400B */
795#define ST_M29F800DB0x58
796#define ST_M29F800DT0xEC
797#define ST_M29W010B0x23
798#define ST_M29W040B0xE3
799#define ST_M29W512B0x27
800#define ST_M28W160ECB0x88CF
801#define ST_M28W160ECT0x88CE
802#define ST_M28W320FCB0x88BB
803#define ST_M28W320FCT0x88BA
804#define ST_M28W640HCB0x8849
805#define ST_M28W640HCT0x8848
806#define ST_M29DW127G0x7E2004
807#define ST_M29W128GH0x7E2101
808#define ST_M29W128GL0x7E2100
809#define ST_M29W160EB0x2249
810#define ST_M29W160ET0x22C4
811#define ST_M29W256GH0x7E21xx
812#define ST_M29W256GL0x7E21xx
813#define ST_M29W320DB0x88CB
814#define ST_M29W320DT0x88CA
815#define ST_M29W400FB0x00EF
816#define ST_M29W400FT0x00EE
817#define ST_M29W512GH0x7E2301
818#define ST_M29W640FB0x22FD
819#define ST_M29W640FT0x22ED
820#define ST_M29W640GB0x7E1000
821#define ST_M29W640GH0x7E0C01
822#define ST_M29W640GL0x7E0C00
823#define ST_M29W640GT0x7E1001
824#define ST_M29W800FB0x225B
825#define ST_M29W800FT0x22D7
826#define ST_M58BW16FB0x8839
827#define ST_M58BW16FT0x883A
828#define ST_M58BW32FB0x8837
829#define ST_M58BW32FT0x8838
830#define ST_M58WR016KB0x8813
831#define ST_M58WR016KT0x8812
832#define ST_M58WR032KB0x8815
833#define ST_M58WR032KT0x8814
834#define ST_M58WR064KB0x8811
835#define ST_M58WR064KT0x8810
836#define ST_MT28GU01G___10x88B0
837#define ST_MT28GU01G___20x88B1
838#define ST_MT28GU256___10x8901
839#define ST_MT28GU256___20x8904
840#define ST_MT28GU512___10x887E
841#define ST_MT28GU512___20x8881
842#define ST_N25Q016__1E0xBB15/* N25Q016, 1.8V, (uniform sectors expected) */
843#define ST_N25Q032__3E0xBA16/* N25Q032, 3.0V, (uniform sectors expected) */
844#define ST_N25Q032__1E0xBB16/* N25Q032, 1.8V, (uniform sectors expected) */
845#define ST_N25Q064__3E0xBA17/* N25Q064, 3.0V, (uniform sectors expected) */
846#define ST_N25Q064__1E0xBB17/* N25Q064, 1.8V, (uniform sectors expected) */
847#define ST_N25Q128__3E0xBA18/* N25Q128, 3.0V, (uniform sectors expected) */
848#define ST_N25Q128__1E0xBB18/* N25Q128, 1.8V, (uniform sectors expected) */
849#define ST_N25Q256__3E0xBA19/* N25Q256, 3.0V, (uniform sectors expected) */
850#define ST_N25Q256__1E0xBB19/* N25Q256, 1.8V, (uniform sectors expected) */
851#define ST_N25Q512__3E0xBA20/* N25Q512, 3.0V, (uniform sectors expected) */
852#define ST_N25Q512__1E0xBB20/* N25Q512, 1.8V, (uniform sectors expected) */
853#define ST_N25Q00A__3E0xBA21/* N25Q00A, 3.0V, (uniform sectors expected) */
854#define ST_NP5Q0320xDA16/* Phase-change memory (PCM), 3V */
855#define ST_NP5Q0640xDA17/* Phase-change memory (PCM), 3V */
856#define ST_NP5Q1280xDA18/* Phase-change memory (PCM), 3V */
857
858#define SYNCMOS_MVC_ID0x40/* SyncMOS (SM) and Mosel Vitelic Corporation (MVC) */
859#define MVC_V29C51000T0x00
860#define MVC_V29C51400T0x13
861#define MVC_V29LC510000x20
862#define MVC_V29LC510010x60
863#define MVC_V29LC510020x82
864#define MVC_V29C51000B0xA0
865#define MVC_V29C51400B0xB3
866#define SM_MVC_29C51001T0x01/* Identical chips: {F,S,V}29C51001T */
867#define SM_MVC_29C51002T0x02/* Identical chips: {F,S,V}29C51002T */
868#define SM_MVC_29C51004T0x03/* Identical chips: {F,S,V}29C51004T */
869#define SM_MVC_29C31004T0x63/* Identical chips: {S,V}29C31004T */
870#define SM_MVC_29C31004B0x73/* Identical chips: {S,V}29C31004B */
871#define SM_MVC_29C51001B0xA1/* Identical chips: {F,S,V}29C51001B */
872#define SM_MVC_29C51002B0xA2/* Identical chips: {F,S,V}29C51002B */
873#define SM_MVC_29C51004B0xA3/* Identical chips: {F,S,V}29C51004B */
874
875#define TENX_ID0x7F7F5E /* Tenx Technologies */
876#define TENX_ID_NOPREFIX0x5E
877#define TENX_ICE25P050x01/* Maybe? */
878
879#define TI_ID0x97/* Texas Instruments */
880#define TI_OLD_ID0x01/* TI chips from last century */
881#define TI_TMS29F002RT0xB0
882#define TI_TMS29F002RB0x34
883
884/*
885 * W25X chips are SPI, first byte of device ID is memory type, second
886 * byte of device ID is related to log(bitsize).
887 */
888#define WINBOND_NEX_ID0xEF/* Winbond (ex Nexcom) serial flashes */
889#define WINBOND_NEX_W25X100x3011
890#define WINBOND_NEX_W25X200x3012
891#define WINBOND_NEX_W25X400x3013
892#define WINBOND_NEX_W25X800x3014
893#define WINBOND_NEX_W25X160x3015
894#define WINBOND_NEX_W25X320x3016
895#define WINBOND_NEX_W25X640x3017
896#define WINBOND_NEX_W25Q40_V0x4013/* W25Q40BV; W25Q40BL (2.3-3.6V) */
897#define WINBOND_NEX_W25Q80_V0x4014/* W25Q80BV */
898#define WINBOND_NEX_W25Q16_V0x4015/* W25Q16CV; W25Q16DV */
899#define WINBOND_NEX_W25Q32_V0x4016/* W25Q32BV; W25Q32FV in SPI mode (default) */
900#define WINBOND_NEX_W25Q64_V0x4017/* W25Q64BV, W25Q64CV; W25Q64FV in SPI mode (default) */
901#define WINBOND_NEX_W25Q128_V0x4018/* W25Q128BV; W25Q128FV in SPI mode (default) */
902#define WINBOND_NEX_W25Q256_V0x4019/* W25Q256FV */
903#define WINBOND_NEX_W25Q20_W0x5012/* W25Q20BW */
904#define WINBOND_NEX_W25Q40_W0x5013/* W25Q40BW */
905#define WINBOND_NEX_W25Q80_W0x5014/* W25Q80BW */
906#define WINBOND_NEX_W25Q16_W0x6015/* W25Q16DW */
907#define WINBOND_NEX_W25Q32_W0x6016/* W25Q32DW; W25Q32FV in QPI mode */
908#define WINBOND_NEX_W25Q64_W0x6017/* W25Q64DW; W25Q64FV in QPI mode */
909#define WINBOND_NEX_W25Q128_W0x6018/* (No W version known) W25Q128FV in QPI mode */
910
911#define WINBOND_ID0xDA/* Winbond */
912#define WINBOND_W19B160BB0x49
913#define WINBOND_W19B160BT0xC4
914#define WINBOND_W19B320SB0x2A/* Same as W19L320SB */
915#define WINBOND_W19B320ST0xBA/* Same as W19L320ST */
916#define WINBOND_W19B322MB0x92
917#define WINBOND_W19B322MT0x10
918#define WINBOND_W19B323MB0x94
919#define WINBOND_W19B323MT0x13
920#define WINBOND_W19B324MB0x97
921#define WINBOND_W19B324MT0x16
922#define WINBOND_W29C0100xC1/* Same as W29C010M, W29C011A, W29EE011, W29EE012, and ASD AE29F1008 */
923#define WINBOND_W29C0200x45/* Same as W29C020C, W29C022 and ASD AE29F2008 */
924#define WINBOND_W29C0400x46/* Same as W29C040P */
925#define WINBOND_W29C512A0xC8/* Same as W29EE512 */
926#define WINBOND_W29GL032CHL0x7E1D01/* Uniform Sectors, WP protects Top OR Bottom sector */
927#define WINBOND_W29GL032CB0x7E1A00/* Top Boot Sector, WP protects Top 2 sectors */
928#define WINBOND_W29GL032CT0x7E1A01/* Bottom Boot Sector, WP protects Bottom 2 sectors */
929#define WINBOND_W29GL064CHL0x7E0C01/* Uniform Sectors, WP protects Top OR Bottom sector */
930#define WINBOND_W29GL064CB0x7E1000/* Top Boot Sector, WP protects Top 2 sectors */
931#define WINBOND_W29GL064CT0x7E1001/* Bottom Boot Sector, WP protects Bottom 2 sectors */
932#define WINBOND_W29GL128CHL0x7E2101/* Uniform Sectors, WP protects Top OR Bottom sector */
933#define WINBOND_W29GL256HL0x7E2201/* Same ID for W29GL0256P and W29GL0256S; uniform Sectors, WP protects Top OR Bottom sector */
934#define WINBOND_W39F0100xA1
935#define WINBOND_W39L0100x31
936#define WINBOND_W39L0200xB5
937#define WINBOND_W39L0400xB6
938#define WINBOND_W39L040A0xD6
939#define WINBOND_W39L5120x38
940#define WINBOND_W39V040A0x3D
941#define WINBOND_W39V040FA0x34
942#define WINBOND_W39V040B0x54/* Same as W39V040FB */
943#define WINBOND_W39V040C0x50/* Same as W39V040FC */
944#define WINBOND_W39V080A0xD0
945#define WINBOND_W39V080FA0xD3
946#define WINBOND_W39V080FA_DM0x93/* W39V080FA dual mode */
947#define WINBOND_W49F0020x25/* Same as W49F002B */
948#define WINBOND_W49F002U0x0B/* Same as W49F002N and ASD AE49F2008 */
949#define WINBOND_W49F0200x8C
950#define WINBOND_W49V002A0xB0
951#define WINBOND_W49V002FA0x32
952
953#endif /* !FLASHCHIPS_H */

Archive Download this file

Revision: HEAD