| 1 | /*␊ |
| 2 | * This file is part of the flashrom project.␊ |
| 3 | *␊ |
| 4 | * Copyright (C) 2009 Carl-Daniel Hailfinger␊ |
| 5 | *␊ |
| 6 | * This program is free software; you can redistribute it and/or modify␊ |
| 7 | * it under the terms of the GNU General Public License as published by␊ |
| 8 | * the Free Software Foundation; either version 2 of the License, or␊ |
| 9 | * (at your option) any later version.␊ |
| 10 | *␊ |
| 11 | * This program is distributed in the hope that it will be useful,␊ |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of␊ |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the␊ |
| 14 | * GNU General Public License for more details.␊ |
| 15 | *␊ |
| 16 | * You should have received a copy of the GNU General Public License␊ |
| 17 | * along with this program; if not, write to the Free Software␊ |
| 18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA␊ |
| 19 | */␊ |
| 20 | ␊ |
| 21 | #include <string.h>␊ |
| 22 | #include <stdlib.h>␊ |
| 23 | #include "flash.h"␊ |
| 24 | #include "programmer.h"␊ |
| 25 | ␊ |
| 26 | #if NEED_PCI == 1␊ |
| 27 | struct pci_dev *pci_dev_find_filter(struct pci_filter filter)␊ |
| 28 | {␊ |
| 29 | ␉struct pci_dev *temp;␊ |
| 30 | ␊ |
| 31 | ␉for (temp = pacc->devices; temp; temp = temp->next)␊ |
| 32 | ␉␉if (pci_filter_match(&filter, temp))␊ |
| 33 | ␉␉␉return temp;␊ |
| 34 | ␊ |
| 35 | ␉return NULL;␊ |
| 36 | }␊ |
| 37 | ␊ |
| 38 | struct pci_dev *pci_dev_find_vendorclass(uint16_t vendor, uint16_t devclass)␊ |
| 39 | {␊ |
| 40 | ␉struct pci_dev *temp;␊ |
| 41 | ␉struct pci_filter filter;␊ |
| 42 | ␉uint16_t tmp2;␊ |
| 43 | ␊ |
| 44 | ␉pci_filter_init(NULL, &filter);␊ |
| 45 | ␉filter.vendor = vendor;␊ |
| 46 | ␊ |
| 47 | ␉for (temp = pacc->devices; temp; temp = temp->next)␊ |
| 48 | ␉␉if (pci_filter_match(&filter, temp)) {␊ |
| 49 | ␉␉␉/* Read PCI class */␊ |
| 50 | ␉␉␉tmp2 = pci_read_word(temp, 0x0a);␊ |
| 51 | ␉␉␉if (tmp2 == devclass)␊ |
| 52 | ␉␉␉␉return temp;␊ |
| 53 | ␉␉}␊ |
| 54 | ␊ |
| 55 | ␉return NULL;␊ |
| 56 | }␊ |
| 57 | ␊ |
| 58 | struct pci_dev *pci_dev_find(uint16_t vendor, uint16_t device)␊ |
| 59 | {␊ |
| 60 | ␉struct pci_dev *temp;␊ |
| 61 | ␉struct pci_filter filter;␊ |
| 62 | ␊ |
| 63 | ␉pci_filter_init(NULL, &filter);␊ |
| 64 | ␉filter.vendor = vendor;␊ |
| 65 | ␉filter.device = device;␊ |
| 66 | ␊ |
| 67 | ␉for (temp = pacc->devices; temp; temp = temp->next)␊ |
| 68 | ␉␉if (pci_filter_match(&filter, temp))␊ |
| 69 | ␉␉␉return temp;␊ |
| 70 | ␊ |
| 71 | ␉return NULL;␊ |
| 72 | }␊ |
| 73 | ␊ |
| 74 | struct pci_dev *pci_card_find(uint16_t vendor, uint16_t device,␊ |
| 75 | ␉␉␉ uint16_t card_vendor, uint16_t card_device)␊ |
| 76 | {␊ |
| 77 | ␉struct pci_dev *temp;␊ |
| 78 | ␉struct pci_filter filter;␊ |
| 79 | ␊ |
| 80 | ␉pci_filter_init(NULL, &filter);␊ |
| 81 | ␉filter.vendor = vendor;␊ |
| 82 | ␉filter.device = device;␊ |
| 83 | ␊ |
| 84 | ␉for (temp = pacc->devices; temp; temp = temp->next)␊ |
| 85 | ␉␉if (pci_filter_match(&filter, temp)) {␊ |
| 86 | ␉␉␉if ((card_vendor ==␊ |
| 87 | ␉␉␉ pci_read_word(temp, PCI_SUBSYSTEM_VENDOR_ID))␊ |
| 88 | ␉␉␉ && (card_device ==␊ |
| 89 | ␉␉␉␉pci_read_word(temp, PCI_SUBSYSTEM_ID)))␊ |
| 90 | ␉␉␉␉return temp;␊ |
| 91 | ␉␉}␊ |
| 92 | ␊ |
| 93 | ␉return NULL;␊ |
| 94 | }␊ |
| 95 | #endif␊ |
| 96 | ␊ |
| 97 | #if CONFIG_INTERNAL == 1␊ |
| 98 | int force_boardenable = 0;␊ |
| 99 | int force_boardmismatch = 0;␊ |
| 100 | ␊ |
| 101 | #if defined(__i386__) || defined(__x86_64__)␊ |
| 102 | void probe_superio(void)␊ |
| 103 | {␊ |
| 104 | ␉probe_superio_ite();␊ |
| 105 | #if 0␊ |
| 106 | ␉/* Winbond Super I/O code is not yet available. */␊ |
| 107 | ␉if (superio.vendor == SUPERIO_VENDOR_NONE)␊ |
| 108 | ␉␉superio = probe_superio_winbond();␊ |
| 109 | #endif␊ |
| 110 | }␊ |
| 111 | ␊ |
| 112 | int superio_count = 0;␊ |
| 113 | #define SUPERIO_MAX_COUNT 3␊ |
| 114 | ␊ |
| 115 | struct superio superios[SUPERIO_MAX_COUNT];␊ |
| 116 | ␊ |
| 117 | int register_superio(struct superio s)␊ |
| 118 | {␊ |
| 119 | ␉if (superio_count == SUPERIO_MAX_COUNT)␊ |
| 120 | ␉␉return 1;␊ |
| 121 | ␉superios[superio_count++] = s;␊ |
| 122 | ␉return 0;␊ |
| 123 | }␊ |
| 124 | ␊ |
| 125 | #endif␊ |
| 126 | ␊ |
| 127 | int is_laptop = 0;␊ |
| 128 | int laptop_ok = 0;␊ |
| 129 | ␊ |
| 130 | static void internal_chip_writeb(const struct flashctx *flash, uint8_t val,␊ |
| 131 | ␉␉␉␉ chipaddr addr);␊ |
| 132 | static void internal_chip_writew(const struct flashctx *flash, uint16_t val,␊ |
| 133 | ␉␉␉␉ chipaddr addr);␊ |
| 134 | static void internal_chip_writel(const struct flashctx *flash, uint32_t val,␊ |
| 135 | ␉␉␉␉ chipaddr addr);␊ |
| 136 | static uint8_t internal_chip_readb(const struct flashctx *flash,␊ |
| 137 | ␉␉␉␉ const chipaddr addr);␊ |
| 138 | static uint16_t internal_chip_readw(const struct flashctx *flash,␊ |
| 139 | ␉␉␉␉ const chipaddr addr);␊ |
| 140 | static uint32_t internal_chip_readl(const struct flashctx *flash,␊ |
| 141 | ␉␉␉␉ const chipaddr addr);␊ |
| 142 | static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf,␊ |
| 143 | ␉␉␉␉const chipaddr addr, size_t len);␊ |
| 144 | static const struct par_programmer par_programmer_internal = {␊ |
| 145 | ␉␉.chip_readb␉␉= internal_chip_readb,␊ |
| 146 | ␉␉.chip_readw␉␉= internal_chip_readw,␊ |
| 147 | ␉␉.chip_readl␉␉= internal_chip_readl,␊ |
| 148 | ␉␉.chip_readn␉␉= internal_chip_readn,␊ |
| 149 | ␉␉.chip_writeb␉␉= internal_chip_writeb,␊ |
| 150 | ␉␉.chip_writew␉␉= internal_chip_writew,␊ |
| 151 | ␉␉.chip_writel␉␉= internal_chip_writel,␊ |
| 152 | ␉␉.chip_writen␉␉= fallback_chip_writen,␊ |
| 153 | };␊ |
| 154 | ␊ |
| 155 | enum chipbustype internal_buses_supported = BUS_NONE;␊ |
| 156 | ␊ |
| 157 | static int internal_shutdown(void *data)␊ |
| 158 | {␊ |
| 159 | ␉release_io_perms();␊ |
| 160 | ␉return 0;␊ |
| 161 | }␊ |
| 162 | ␊ |
| 163 | int internal_init(void)␊ |
| 164 | {␊ |
| 165 | #if __FLASHROM_LITTLE_ENDIAN__␊ |
| 166 | ␉int ret = 0;␊ |
| 167 | #endif␊ |
| 168 | ␉int force_laptop = 0;␊ |
| 169 | ␉int not_a_laptop = 0;␊ |
| 170 | ␉char *arg;␊ |
| 171 | ␊ |
| 172 | ␉arg = extract_programmer_param("boardenable");␊ |
| 173 | ␉if (arg && !strcmp(arg,"force")) {␊ |
| 174 | ␉␉force_boardenable = 1;␊ |
| 175 | ␉} else if (arg && !strlen(arg)) {␊ |
| 176 | ␉␉msg_perr("Missing argument for boardenable.\n");␊ |
| 177 | ␉␉free(arg);␊ |
| 178 | ␉␉return 1;␊ |
| 179 | ␉} else if (arg) {␊ |
| 180 | ␉␉msg_perr("Unknown argument for boardenable: %s\n", arg);␊ |
| 181 | ␉␉free(arg);␊ |
| 182 | ␉␉return 1;␊ |
| 183 | ␉}␊ |
| 184 | ␉free(arg);␊ |
| 185 | ␊ |
| 186 | ␉arg = extract_programmer_param("boardmismatch");␊ |
| 187 | ␉if (arg && !strcmp(arg,"force")) {␊ |
| 188 | ␉␉force_boardmismatch = 1;␊ |
| 189 | ␉} else if (arg && !strlen(arg)) {␊ |
| 190 | ␉␉msg_perr("Missing argument for boardmismatch.\n");␊ |
| 191 | ␉␉free(arg);␊ |
| 192 | ␉␉return 1;␊ |
| 193 | ␉} else if (arg) {␊ |
| 194 | ␉␉msg_perr("Unknown argument for boardmismatch: %s\n", arg);␊ |
| 195 | ␉␉free(arg);␊ |
| 196 | ␉␉return 1;␊ |
| 197 | ␉}␊ |
| 198 | ␉free(arg);␊ |
| 199 | ␊ |
| 200 | ␉arg = extract_programmer_param("laptop");␊ |
| 201 | ␉if (arg && !strcmp(arg, "force_I_want_a_brick"))␊ |
| 202 | ␉␉force_laptop = 1;␊ |
| 203 | ␉else if (arg && !strcmp(arg, "this_is_not_a_laptop"))␊ |
| 204 | ␉␉not_a_laptop = 1;␊ |
| 205 | ␉else if (arg && !strlen(arg)) {␊ |
| 206 | ␉␉msg_perr("Missing argument for laptop.\n");␊ |
| 207 | ␉␉free(arg);␊ |
| 208 | ␉␉return 1;␊ |
| 209 | ␉} else if (arg) {␊ |
| 210 | ␉␉msg_perr("Unknown argument for laptop: %s\n", arg);␊ |
| 211 | ␉␉free(arg);␊ |
| 212 | ␉␉return 1;␊ |
| 213 | ␉}␊ |
| 214 | ␉free(arg);␊ |
| 215 | ␊ |
| 216 | ␉arg = extract_programmer_param("mainboard");␊ |
| 217 | ␉if (arg && strlen(arg)) {␊ |
| 218 | ␉␉lb_vendor_dev_from_string(arg);␊ |
| 219 | ␉} else if (arg && !strlen(arg)) {␊ |
| 220 | ␉␉msg_perr("Missing argument for mainboard.\n");␊ |
| 221 | ␉␉free(arg);␊ |
| 222 | ␉␉return 1;␊ |
| 223 | ␉}␊ |
| 224 | ␉free(arg);␊ |
| 225 | ␊ |
| 226 | ␉get_io_perms();␊ |
| 227 | ␉if (register_shutdown(internal_shutdown, NULL))␊ |
| 228 | ␉␉return 1;␊ |
| 229 | ␊ |
| 230 | ␉/* Default to Parallel/LPC/FWH flash devices. If a known host controller␊ |
| 231 | ␉ * is found, the host controller init routine sets the␊ |
| 232 | ␉ * internal_buses_supported bitfield.␊ |
| 233 | ␉ */␊ |
| 234 | ␉internal_buses_supported = BUS_NONSPI;␊ |
| 235 | ␊ |
| 236 | ␉/* Initialize PCI access for flash enables */␊ |
| 237 | ␉pacc = pci_alloc();␉/* Get the pci_access structure */␊ |
| 238 | ␉/* Set all options you want -- here we stick with the defaults */␊ |
| 239 | ␉pci_init(pacc);␉␉/* Initialize the PCI library */␊ |
| 240 | ␉pci_scan_bus(pacc);␉/* We want to get the list of devices */␊ |
| 241 | ␊ |
| 242 | ␉if (processor_flash_enable()) {␊ |
| 243 | ␉␉msg_perr("Processor detection/init failed.\n"␊ |
| 244 | ␉␉␉ "Aborting.\n");␊ |
| 245 | ␉␉return 1;␊ |
| 246 | ␉}␊ |
| 247 | ␊ |
| 248 | #if defined(__i386__) || defined(__x86_64__)␊ |
| 249 | ␉/* We look at the cbtable first to see if we need a␊ |
| 250 | ␉ * mainboard specific flash enable sequence.␊ |
| 251 | ␉ */␊ |
| 252 | ␉coreboot_init();␊ |
| 253 | ␊ |
| 254 | ␉dmi_init();␊ |
| 255 | ␊ |
| 256 | ␉/* In case Super I/O probing would cause pretty explosions. */␊ |
| 257 | ␉board_handle_before_superio();␊ |
| 258 | ␊ |
| 259 | ␉/* Probe for the Super I/O chip and fill global struct superio. */␊ |
| 260 | ␉probe_superio();␊ |
| 261 | #else␊ |
| 262 | ␉/* FIXME: Enable cbtable searching on all non-x86 platforms supported␊ |
| 263 | ␉ * by coreboot.␊ |
| 264 | ␉ * FIXME: Find a replacement for DMI on non-x86.␊ |
| 265 | ␉ * FIXME: Enable Super I/O probing once port I/O is possible.␊ |
| 266 | ␉ */␊ |
| 267 | #endif␊ |
| 268 | ␊ |
| 269 | ␉/* Check laptop whitelist. */␊ |
| 270 | ␉board_handle_before_laptop();␊ |
| 271 | ␊ |
| 272 | ␉/* Warn if a non-whitelisted laptop is detected. */␊ |
| 273 | ␉if (is_laptop && !laptop_ok) {␊ |
| 274 | ␉␉msg_perr("========================================================================\n");␊ |
| 275 | ␉␉if (is_laptop == 1) {␊ |
| 276 | ␉␉␉msg_perr("WARNING! You seem to be running flashrom on an unsupported laptop.\n");␊ |
| 277 | ␉␉} else {␊ |
| 278 | ␉␉␉msg_perr("WARNING! You may be running flashrom on an unsupported laptop. We could\n"␊ |
| 279 | ␉␉␉␉ "not detect this for sure because your vendor has not setup the SMBIOS\n"␊ |
| 280 | ␉␉␉␉ "tables correctly. You can enforce execution by adding\n"␊ |
| 281 | ␉␉␉␉ "'-p internal:laptop=this_is_not_a_laptop' to the command line, but\n"␊ |
| 282 | ␉␉␉␉ "please read the following warning if you are not sure.\n\n");␊ |
| 283 | ␉␉}␊ |
| 284 | ␉␉msg_perr("Laptops, notebooks and netbooks are difficult to support and we\n"␊ |
| 285 | ␉␉␉ "recommend to use the vendor flashing utility. The embedded controller\n"␊ |
| 286 | ␉␉␉ "(EC) in these machines often interacts badly with flashing.\n"␊ |
| 287 | ␉␉␉ "See http://www.flashrom.org/Laptops for details.\n\n"␊ |
| 288 | ␉␉␉ "If flash is shared with the EC, erase is guaranteed to brick your laptop\n"␊ |
| 289 | ␉␉␉ "and write may brick your laptop.\n"␊ |
| 290 | ␉␉␉ "Read and probe may irritate your EC and cause fan failure, backlight\n"␊ |
| 291 | ␉␉␉ "failure and sudden poweroff.\n"␊ |
| 292 | ␉␉␉ "You have been warned.\n"␊ |
| 293 | ␉␉␉ "========================================================================\n");␊ |
| 294 | ␊ |
| 295 | ␉␉if (force_laptop || (not_a_laptop && (is_laptop == 2))) {␊ |
| 296 | ␉␉␉msg_perr("Proceeding anyway because user forced us to.\n");␊ |
| 297 | ␉␉} else {␊ |
| 298 | ␉␉␉msg_perr("Aborting.\n");␊ |
| 299 | ␉␉␉exit(1);␊ |
| 300 | ␉␉}␊ |
| 301 | ␉}␊ |
| 302 | ␊ |
| 303 | #if __FLASHROM_LITTLE_ENDIAN__␊ |
| 304 | ␉/* try to enable it. Failure IS an option, since not all motherboards␊ |
| 305 | ␉ * really need this to be done, etc., etc.␊ |
| 306 | ␉ */␊ |
| 307 | ␉ret = chipset_flash_enable();␊ |
| 308 | ␉if (ret == -2) {␊ |
| 309 | ␉␉msg_perr("WARNING: No chipset found. Flash detection "␊ |
| 310 | ␉␉␉ "will most likely fail.\n");␊ |
| 311 | ␉} else if (ret == ERROR_FATAL)␊ |
| 312 | ␉␉return ret;␊ |
| 313 | ␊ |
| 314 | #if defined(__i386__) || defined(__x86_64__)␊ |
| 315 | ␉/* Probe unconditionally for IT87* LPC->SPI translation and for␊ |
| 316 | ␉ * IT87* Parallel write enable.␊ |
| 317 | ␉ */␊ |
| 318 | ␉init_superio_ite();␊ |
| 319 | #endif␊ |
| 320 | ␊ |
| 321 | ␉board_flash_enable(lb_vendor, lb_part);␊ |
| 322 | ␊ |
| 323 | ␉/* Even if chipset init returns an error code, we don't want to abort.␊ |
| 324 | ␉ * The error code might have been a warning only.␊ |
| 325 | ␉ * Besides that, we don't check the board enable return code either.␊ |
| 326 | ␉ */␊ |
| 327 | #if defined(__i386__) || defined(__x86_64__) || defined (__mips)␊ |
| 328 | ␉register_par_programmer(&par_programmer_internal, internal_buses_supported);␊ |
| 329 | ␉return 0;␊ |
| 330 | #else␊ |
| 331 | ␉msg_perr("Your platform is not supported yet for the internal "␊ |
| 332 | ␉␉ "programmer due to missing\n"␊ |
| 333 | ␉␉ "flash_base and top/bottom alignment information.\n"␊ |
| 334 | ␉␉ "Aborting.\n");␊ |
| 335 | ␉return 1;␊ |
| 336 | #endif␊ |
| 337 | #else␊ |
| 338 | ␉/* FIXME: Remove this unconditional abort once all PCI drivers are␊ |
| 339 | ␉ * converted to use little-endian accesses for memory BARs.␊ |
| 340 | ␉ */␊ |
| 341 | ␉msg_perr("Your platform is not supported yet for the internal "␊ |
| 342 | ␉␉ "programmer because it has\n"␊ |
| 343 | ␉␉ "not been converted from native endian to little endian "␊ |
| 344 | ␉␉ "access yet.\n"␊ |
| 345 | ␉␉ "Aborting.\n");␊ |
| 346 | ␉return 1;␊ |
| 347 | #endif␊ |
| 348 | }␊ |
| 349 | #endif␊ |
| 350 | ␊ |
| 351 | static void internal_chip_writeb(const struct flashctx *flash, uint8_t val,␊ |
| 352 | ␉␉␉␉ chipaddr addr)␊ |
| 353 | {␊ |
| 354 | ␉mmio_writeb(val, (void *) addr);␊ |
| 355 | }␊ |
| 356 | ␊ |
| 357 | static void internal_chip_writew(const struct flashctx *flash, uint16_t val,␊ |
| 358 | ␉␉␉␉ chipaddr addr)␊ |
| 359 | {␊ |
| 360 | ␉mmio_writew(val, (void *) addr);␊ |
| 361 | }␊ |
| 362 | ␊ |
| 363 | static void internal_chip_writel(const struct flashctx *flash, uint32_t val,␊ |
| 364 | ␉␉␉␉ chipaddr addr)␊ |
| 365 | {␊ |
| 366 | ␉mmio_writel(val, (void *) addr);␊ |
| 367 | }␊ |
| 368 | ␊ |
| 369 | static uint8_t internal_chip_readb(const struct flashctx *flash,␊ |
| 370 | ␉␉␉␉ const chipaddr addr)␊ |
| 371 | {␊ |
| 372 | ␉return mmio_readb((void *) addr);␊ |
| 373 | }␊ |
| 374 | ␊ |
| 375 | static uint16_t internal_chip_readw(const struct flashctx *flash,␊ |
| 376 | ␉␉␉␉ const chipaddr addr)␊ |
| 377 | {␊ |
| 378 | ␉return mmio_readw((void *) addr);␊ |
| 379 | }␊ |
| 380 | ␊ |
| 381 | static uint32_t internal_chip_readl(const struct flashctx *flash,␊ |
| 382 | ␉␉␉␉ const chipaddr addr)␊ |
| 383 | {␊ |
| 384 | ␉return mmio_readl((void *) addr);␊ |
| 385 | }␊ |
| 386 | ␊ |
| 387 | static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf,␊ |
| 388 | ␉␉␉␉const chipaddr addr, size_t len)␊ |
| 389 | {␊ |
| 390 | ␉memcpy(buf, (void *)addr, len);␊ |
| 391 | ␉return;␊ |
| 392 | }␊ |
| 393 | |