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1/*␊
2 * This file is part of the flashrom project.␊
3 *␊
4 * Copyright (C) 2009,2010 Carl-Daniel Hailfinger␊
5 *␊
6 * This program is free software; you can redistribute it and/or modify␊
7 * it under the terms of the GNU General Public License as published by␊
8 * the Free Software Foundation; either version 2 of the License, or␊
9 * (at your option) any later version.␊
10 *␊
11 * This program is distributed in the hope that it will be useful,␊
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of␊
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the␊
14 * GNU General Public License for more details.␊
15 *␊
16 * You should have received a copy of the GNU General Public License␊
17 * along with this program; if not, write to the Free Software␊
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA␊
19 */␊
20␊
21#include <stdint.h>␊
22#include <string.h>␊
23#include <stdlib.h>␊
24#include <sys/types.h>␊
25#if !defined (__DJGPP__) && !defined(__LIBPAYLOAD__)␊
26#include <unistd.h>␊
27#include <fcntl.h>␊
28#endif␊
29#if !defined (__DJGPP__)␊
30#include <errno.h>␊
31#endif␊
32#include "flash.h"␊
33␊
34#if defined(__i386__) || defined(__x86_64__)␊
35␊
36/* sync primitive is not needed because x86 uses uncached accesses␊
37 * which have a strongly ordered memory model.␊
38 */␊
39static inline void sync_primitive(void)␊
40{␊
41}␊
42␊
43#if defined(__FreeBSD__) || defined(__DragonFly__)␊
44int io_fd;␊
45#endif␊
46␊
47void get_io_perms(void)␊
48{␊
49#if defined(__DJGPP__) || defined(__LIBPAYLOAD__)␊
50␉/* We have full permissions by default. */␊
51␉return;␊
52#else␊
53#if defined (__sun) && (defined(__i386) || defined(__amd64))␊
54␉if (sysi86(SI86V86, V86SC_IOPL, PS_IOPL) != 0) {␊
55#elif defined(__FreeBSD__) || defined (__DragonFly__)␊
56␉if ((io_fd = open("/dev/io", O_RDWR)) < 0) {␊
57#else ␊
58␉if (iopl(3) != 0) {␊
59#endif␊
60␉␉msg_perr("ERROR: Could not get I/O privileges (%s).\n"␊
61␉␉␉"You need to be root.\n", strerror(errno));␊
62#if defined (__OpenBSD__)␊
63␉␉msg_perr("Please set securelevel=-1 in /etc/rc.securelevel "␊
64␉␉␉ "and reboot, or reboot into \n");␊
65␉␉msg_perr("single user mode.\n");␊
66#endif␊
67␉␉exit(1);␊
68␉}␊
69#endif␊
70}␊
71␊
72void release_io_perms(void)␊
73{␊
74#if defined(__FreeBSD__) || defined(__DragonFly__)␊
75␉close(io_fd);␊
76#endif␊
77}␊
78␊
79#elif defined(__powerpc__) || defined(__powerpc64__) || defined(__ppc__) || defined(__ppc64__)␊
80␊
81static inline void sync_primitive(void)␊
82{␊
83␉/* Prevent reordering and/or merging of reads/writes to hardware.␊
84␉ * Such reordering and/or merging would break device accesses which␊
85␉ * depend on the exact access order.␊
86␉ */␊
87␉asm("eieio" : : : "memory");␊
88}␊
89␊
90/* PCI port I/O is not yet implemented on PowerPC. */␊
91void get_io_perms(void)␊
92{␊
93}␊
94␊
95/* PCI port I/O is not yet implemented on PowerPC. */␊
96void release_io_perms(void)␊
97{␊
98}␊
99␊
100#elif defined (__mips) || defined (__mips__) || defined (_mips) || defined (mips)␊
101␊
102/* sync primitive is not needed because /dev/mem on MIPS uses uncached accesses␊
103 * in mode 2 which has a strongly ordered memory model.␊
104 */␊
105static inline void sync_primitive(void)␊
106{␊
107}␊
108␊
109/* PCI port I/O is not yet implemented on MIPS. */␊
110void get_io_perms(void)␊
111{␊
112}␊
113␊
114/* PCI port I/O is not yet implemented on MIPS. */␊
115void release_io_perms(void)␊
116{␊
117}␊
118␊
119#else␊
120␊
121#error Unknown architecture␊
122␊
123#endif␊
124␊
125void mmio_writeb(uint8_t val, void *addr)␊
126{␊
127␉*(volatile uint8_t *) addr = val;␊
128␉sync_primitive();␊
129}␊
130␊
131void mmio_writew(uint16_t val, void *addr)␊
132{␊
133␉*(volatile uint16_t *) addr = val;␊
134␉sync_primitive();␊
135}␊
136␊
137void mmio_writel(uint32_t val, void *addr)␊
138{␊
139␉*(volatile uint32_t *) addr = val;␊
140␉sync_primitive();␊
141}␊
142␊
143uint8_t mmio_readb(void *addr)␊
144{␊
145␉return *(volatile uint8_t *) addr;␊
146}␊
147␊
148uint16_t mmio_readw(void *addr)␊
149{␊
150␉return *(volatile uint16_t *) addr;␊
151}␊
152␊
153uint32_t mmio_readl(void *addr)␊
154{␊
155␉return *(volatile uint32_t *) addr;␊
156}␊
157␊
158void mmio_le_writeb(uint8_t val, void *addr)␊
159{␊
160␉mmio_writeb(cpu_to_le8(val), addr);␊
161}␊
162␊
163void mmio_le_writew(uint16_t val, void *addr)␊
164{␊
165␉mmio_writew(cpu_to_le16(val), addr);␊
166}␊
167␊
168void mmio_le_writel(uint32_t val, void *addr)␊
169{␊
170␉mmio_writel(cpu_to_le32(val), addr);␊
171}␊
172␊
173uint8_t mmio_le_readb(void *addr)␊
174{␊
175␉return le_to_cpu8(mmio_readb(addr));␊
176}␊
177␊
178uint16_t mmio_le_readw(void *addr)␊
179{␊
180␉return le_to_cpu16(mmio_readw(addr));␊
181}␊
182␊
183uint32_t mmio_le_readl(void *addr)␊
184{␊
185␉return le_to_cpu32(mmio_readl(addr));␊
186}␊
187␊
188enum mmio_write_type {␊
189␉mmio_write_type_b,␊
190␉mmio_write_type_w,␊
191␉mmio_write_type_l,␊
192};␊
193␊
194struct undo_mmio_write_data {␊
195␉void *addr;␊
196␉int reg;␊
197␉enum mmio_write_type type;␊
198␉union {␊
199␉␉uint8_t bdata;␊
200␉␉uint16_t wdata;␊
201␉␉uint32_t ldata;␊
202␉};␊
203};␊
204␊
205int undo_mmio_write(void *p)␊
206{␊
207␉struct undo_mmio_write_data *data = p;␊
208␉msg_pdbg("Restoring MMIO space at %p\n", data->addr);␊
209␉switch (data->type) {␊
210␉case mmio_write_type_b:␊
211␉␉mmio_writeb(data->bdata, data->addr);␊
212␉␉break;␊
213␉case mmio_write_type_w:␊
214␉␉mmio_writew(data->wdata, data->addr);␊
215␉␉break;␊
216␉case mmio_write_type_l:␊
217␉␉mmio_writel(data->ldata, data->addr);␊
218␉␉break;␊
219␉}␊
220␉/* p was allocated in register_undo_mmio_write. */␊
221␉free(p);␊
222␉return 0;␊
223}␊
224␊
225#define register_undo_mmio_write(a, c)␉␉␉␉␉\␊
226{␉␉␉␉␉␉␉␉␉\␊
227␉struct undo_mmio_write_data *undo_mmio_write_data;␉␉\␊
228␉undo_mmio_write_data = malloc(sizeof(struct undo_mmio_write_data)); \␊
229␉if (!undo_mmio_write_data) {␉␉␉␉␉\␊
230␉␉msg_gerr("Out of memory!\n");␉␉␉␉\␊
231␉␉exit(1);␉␉␉␉␉␉\␊
232␉}␉␉␉␉␉␉␉␉\␊
233␉undo_mmio_write_data->addr = a;␉␉␉␉␉\␊
234␉undo_mmio_write_data->type = mmio_write_type_##c;␉␉\␊
235␉undo_mmio_write_data->c##data = mmio_read##c(a);␉␉\␊
236␉register_shutdown(undo_mmio_write, undo_mmio_write_data);␉\␊
237}␊
238␊
239#define register_undo_mmio_writeb(a) register_undo_mmio_write(a, b)␊
240#define register_undo_mmio_writew(a) register_undo_mmio_write(a, w)␊
241#define register_undo_mmio_writel(a) register_undo_mmio_write(a, l)␊
242␊
243void rmmio_writeb(uint8_t val, void *addr)␊
244{␊
245␉register_undo_mmio_writeb(addr);␊
246␉mmio_writeb(val, addr);␊
247}␊
248␊
249void rmmio_writew(uint16_t val, void *addr)␊
250{␊
251␉register_undo_mmio_writew(addr);␊
252␉mmio_writew(val, addr);␊
253}␊
254␊
255void rmmio_writel(uint32_t val, void *addr)␊
256{␊
257␉register_undo_mmio_writel(addr);␊
258␉mmio_writel(val, addr);␊
259}␊
260␊
261void rmmio_le_writeb(uint8_t val, void *addr)␊
262{␊
263␉register_undo_mmio_writeb(addr);␊
264␉mmio_le_writeb(val, addr);␊
265}␊
266␊
267void rmmio_le_writew(uint16_t val, void *addr)␊
268{␊
269␉register_undo_mmio_writew(addr);␊
270␉mmio_le_writew(val, addr);␊
271}␊
272␊
273void rmmio_le_writel(uint32_t val, void *addr)␊
274{␊
275␉register_undo_mmio_writel(addr);␊
276␉mmio_le_writel(val, addr);␊
277}␊
278␊
279void rmmio_valb(void *addr)␊
280{␊
281␉register_undo_mmio_writeb(addr);␊
282}␊
283␊
284void rmmio_valw(void *addr)␊
285{␊
286␉register_undo_mmio_writew(addr);␊
287}␊
288␊
289void rmmio_vall(void *addr)␊
290{␊
291␉register_undo_mmio_writel(addr);␊
292}␊
293

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