Flashrom

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1.TH FLASHROM 8 "Jul 25, 2011"
2.SH NAME
3flashrom \- detect, read, write, verify and erase flash chips
4.SH SYNOPSIS
5.B flashrom \fR[\fB\-n\fR] [\fB\-V\fR] [\fB\-f\fR] [\fB\-h\fR|\fB\-R\fR|\
6\fB\-L\fR|\fB\-z\fR|\fB\-E\fR|\fB\-r\fR <file>|\fB\-w\fR <file>|\
7\fB\-v\fR <file>]
8 [\fB\-c\fR <chipname>] \
9[\fB\-l\fR <file>]
10 [\fB\-i\fR <image>] [\fB\-p\fR <programmername>[:<parameters>]]
11.SH DESCRIPTION
12.B flashrom
13is a utility for detecting, reading, writing, verifying and erasing flash
14chips. It's often used to flash BIOS/EFI/coreboot/firmware images in-system
15using a supported mainboard. However, it also supports various external
16PCI/USB/parallel-port/serial-port based devices which can program flash chips,
17including some network cards (NICs), SATA/IDE controller cards, graphics cards,
18the Bus Pirate device, various FTDI FT2232/FT4232H based USB devices, and more.
19.PP
20It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, TSOP40,
21TSOP48, and BGA chips, which use various protocols such as LPC, FWH,
22parallel flash, or SPI.
23.SH OPTIONS
24.B IMPORTANT:
25Please note that the command line interface for flashrom will change before
26flashrom 1.0. Do not use flashrom in scripts or other automated tools without
27checking that your flashrom version won't interpret options in a different way.
28.PP
29You can specify one of
30.BR \-h ", " \-R ", " \-L ", " \-z ", " \-E ", " \-r ", " \-w ", " \-v
31or no operation.
32If no operation is specified, flashrom will only probe for flash chips. It is
33recommended that if you try flashrom the first time on a system, you run it
34in probe-only mode and check the output. Also you are advised to make a
35backup of your current ROM contents with
36.B \-r
37before you try to write a new image.
38.TP
39.B "\-r, \-\-read <file>"
40Read flash ROM contents and save them into the given
41.BR <file> .
42If the file already exists, it will be overwritten.
43.TP
44.B "\-w, \-\-write <file>"
45Write
46.B <file>
47into flash ROM. This will first automatically
48.B erase
49the chip, then write to it.
50.sp
51In the process the chip is also read several times. First an in-memory backup
52is made for disaster recovery and to be able to skip regions that are
53already equal to the image file. This copy is updated along with the write
54operation. In case of erase errors it is even re-read completely. After
55writing has finished and if verification is enabled, the whole flash chip is
56read out and compared with the input image.
57.TP
58.B "\-n, \-\-noverify"
59Skip the automatic verification of flash ROM contents after writing. Using this
60option is
61.B not
62recommended, you should only use it if you know what you are doing and if you
63feel that the time for verification takes too long.
64.sp
65Typical usage is:
66.B "flashrom \-n \-w <file>"
67.sp
68This option is only useful in combination with
69.BR \-\-write .
70.TP
71.B "\-v, \-\-verify <file>"
72Verify the flash ROM contents against the given
73.BR <file> .
74.TP
75.B "\-E, \-\-erase"
76Erase the flash ROM chip.
77.TP
78.B "\-V, \-\-verbose"
79More verbose output. This option can be supplied multiple times
80(max. 3 times, i.e.
81.BR \-VVV )
82for even more debug output.
83.TP
84.B "\-c, \-\-chip" <chipname>
85Probe only for the specified flash ROM chip. This option takes the chip name as
86printed by
87.B "flashrom \-L"
88without the vendor name as parameter. Please note that the chip name is
89case sensitive.
90.TP
91.B "\-f, \-\-force"
92Force one or more of the following actions:
93.sp
94* Force chip read and pretend the chip is there.
95.sp
96* Force chip access even if the chip is bigger than the maximum supported \
97size for the flash bus.
98.sp
99* Force erase even if erase is known bad.
100.sp
101* Force write even if write is known bad.
102.TP
103.B "\-l, \-\-layout <file>"
104Read ROM layout from
105.BR <file> .
106.sp
107flashrom supports ROM layouts. This allows you to flash certain parts of
108the flash chip only. A ROM layout file looks like follows:
109.sp
110 00000000:00008fff gfxrom
111 00009000:0003ffff normal
112 00040000:0007ffff fallback
113.sp
114 i.e.:
115 startaddr:endaddr name
116.sp
117All addresses are offsets within the file, not absolute addresses!
118If you only want to update the normal image in a ROM you can say:
119.sp
120.B " flashrom \-\-layout rom.layout \-\-image normal \-w agami_aruma.rom"
121.sp
122To update normal and fallback but leave the VGA BIOS alone, say:
123.sp
124.B " flashrom \-l rom.layout \-i normal \"
125.br
126.B " \-i fallback \-w agami_aruma.rom"
127.sp
128Currently overlapping sections are not supported.
129.TP
130.B "\-i, \-\-image <name>"
131Only flash image
132.B <name>
133from flash layout.
134.TP
135.B "\-L, \-\-list\-supported"
136List the flash chips, chipsets, mainboards, and external programmers
137(including PCI, USB, parallel port, and serial port based devices)
138supported by flashrom.
139.sp
140There are many unlisted boards which will work out of the box, without
141special support in flashrom. Please let us know if you can verify that
142other boards work or do not work out of the box.
143.sp
144.B IMPORTANT:
145For verification you have
146to test an ERASE and/or WRITE operation, so make sure you only do that
147if you have proper means to recover from failure!
148.TP
149.B "\-z, \-\-list\-supported-wiki"
150Same as
151.BR \-\-list\-supported ,
152but outputs the supported hardware in MediaWiki syntax, so that it can be
153easily pasted into the wiki page at
154.BR http://www.flashrom.org/ .
155Please note that MediaWiki output is not compiled in by default.
156.TP
157.B "\-p, \-\-programmer <name>[:parameter[,parameter[,parameter]]]"
158Specify the programmer device. Currently supported are:
159.sp
160.BR "* internal" " (default, for in-system flashing in the mainboard)"
161.sp
162.BR "* dummy" " (virtual programmer for testing flashrom)"
163.sp
164.BR "* nic3com" " (for flash ROMs on 3COM network cards)"
165.sp
166.BR "* nicrealtek" " (for flash ROMs on Realtek network cards)"
167.sp
168.BR "* nicsmc1211" " (for flash ROMs on RTL8139-compatible SMC2 network cards)"
169.sp
170.BR "* nicnatsemi" " (for flash ROMs on National Semiconductor DP838* network \
171cards)"
172.sp
173.BR "* nicintel" " (for parallel flash ROMs on Intel 10/100Mbit network cards)
174.sp
175.BR "* gfxnvidia" " (for flash ROMs on NVIDIA graphics cards)"
176.sp
177.BR "* drkaiser" " (for flash ROMs on Dr. Kaiser PC-Waechter PCI cards)"
178.sp
179.BR "* satasii" " (for flash ROMs on Silicon Image SATA/IDE controllers)"
180.sp
181.BR "* satamv" " (for flash ROMs on Marvell SATA controllers)"
182.sp
183.BR "* atahpt" " (for flash ROMs on Highpoint ATA/RAID controllers)"
184.sp
185.BR "* ft2232_spi" " (for SPI flash ROMs attached to an FT2232/FT4232H family \
186based USB SPI programmer), including the DLP Design DLP-USB1232H, \
187FTDI FT2232H Mini-Module, FTDI FT4232H Mini-Module, openbiosprog-spi, Amontec \
188JTAGkey/JTAGkey-tiny/JTAGkey-2, Dangerous Prototypes Bus Blaster, \
189Olimex ARM-USB-TINY/-H, Olimex ARM-USB-OCD/-H, TIAO/DIYGADGET USB
190Multi-Protocol Adapter (TUMPA), and GOEPEL PicoTAP.
191.sp
192.BR "* serprog" " (for flash ROMs attached to a programmer speaking serprog), \
193including AVR flasher by Urja Rannikko, AVR flasher by eightdot, \
194Arduino Mega flasher by fritz, InSystemFlasher by Juhana Helovuo, and \
195atmegaXXu2-flasher by Stefan Tauner."
196.sp
197.BR "* buspirate_spi" " (for SPI flash ROMs attached to a Bus Pirate)"
198.sp
199.BR "* dediprog" " (for SPI flash ROMs attached to a Dediprog SF100)"
200.sp
201.BR "* rayer_spi" " (for SPI flash ROMs attached to a RayeR parport "
202or Xilinx DLC5 compatible cable)
203.sp
204.BR "* nicintel_spi" " (for SPI flash ROMs on Intel Gigabit network cards)"
205.sp
206.BR "* ogp_spi" " (for SPI flash ROMs on Open Graphics Project graphics card)"
207.sp
208Some programmers have optional or mandatory parameters which are described
209in detail in the
210.B PROGRAMMER SPECIFIC INFO
211section. Support for some programmers can be disabled at compile time.
212.B "flashrom \-h"
213lists all supported programmers.
214.TP
215.B "\-h, \-\-help"
216Show a help text and exit.
217.TP
218.B "\-R, \-\-version"
219Show version information and exit.
220.SH PROGRAMMER SPECIFIC INFO
221Some programmer drivers accept further parameters to set programmer-specific
222parameters. These parameters are separated from the programmer name by a
223colon. While some programmers take arguments at fixed positions, other
224programmers use a key/value interface in which the key and value is separated
225by an equal sign and different pairs are separated by a comma or a colon.
226.TP
227.BR "internal " programmer
228Some mainboards require to run mainboard specific code to enable flash erase
229and write support (and probe support on old systems with parallel flash).
230The mainboard brand and model (if it requires specific code) is usually
231autodetected using one of the following mechanisms: If your system is
232running coreboot, the mainboard type is determined from the coreboot table.
233Otherwise, the mainboard is detected by examining the onboard PCI devices
234and possibly DMI info. If PCI and DMI do not contain information to uniquely
235identify the mainboard (which is the exception), or if you want to override
236the detected mainboard model, you can specify the mainboard using the
237.sp
238.B " flashrom \-p internal:mainboard=[<vendor>:]<board>"
239syntax.
240.sp
241See the 'Known boards' or 'Known laptops' section in the output
242of 'flashrom \-L' for a list of boards which require the specification of
243the board name, if no coreboot table is found.
244.sp
245Some of these board-specific flash enabling functions (called
246.BR "board enables" )
247in flashrom have not yet been tested. If your mainboard is detected needing
248an untested board enable function, a warning message is printed and the
249board enable is not executed, because a wrong board enable function might
250cause the system to behave erratically, as board enable functions touch the
251low-level internals of a mainboard. Not executing a board enable function
252(if one is needed) might cause detection or erasing failure. If your board
253protects only part of the flash (commonly the top end, called boot block),
254flashrom might encounter an error only after erasing the unprotected part,
255so running without the board-enable function might be dangerous for erase
256and write (which includes erase).
257.sp
258The suggested procedure for a mainboard with untested board specific code is
259to first try to probe the ROM (just invoke flashrom and check that it
260detects your flash chip type) without running the board enable code (i.e.
261without any parameters). If it finds your chip, fine. Otherwise, retry
262probing your chip with the board-enable code running, using
263.sp
264.B " flashrom \-p internal:boardenable=force"
265.sp
266If your chip is still not detected, the board enable code seems to be broken
267or the flash chip unsupported. Otherwise, make a backup of your current ROM
268contents (using
269.BR \-r )
270and store it to a medium outside of your computer, like
271a USB drive or a network share. If you needed to run the board enable code
272already for probing, use it for reading too. Now you can try to write the
273new image. You should enable the board enable code in any case now, as it
274has been written because it is known that writing/erasing without the board
275enable is going to fail. In any case (success or failure), please report to
276the flashrom mailing list, see below.
277.sp
278On systems running coreboot, flashrom checks whether the desired image matches
279your mainboard. This needs some special board ID to be present in the image.
280If flashrom detects that the image you want to write and the current board
281do not match, it will refuse to write the image unless you specify
282.sp
283.B " flashrom \-p internal:boardmismatch=force"
284.sp
285If your mainboard uses an ITE IT87 series Super I/O for LPC<->SPI flash bus
286translation, flashrom should autodetect that configuration. If you want to
287set the I/O base port of the IT87 series SPI controller manually instead of
288using the value provided by the BIOS, use the
289.sp
290.B " flashrom \-p internal:it87spiport=portnum"
291.sp
292syntax where
293.B portnum
294is the I/O port number (must be a multiple of 8). In the unlikely case
295flashrom doesn't detect an active IT87 LPC<->SPI bridge, please send a bug
296report so we can diagnose the problem.
297.sp
298If you have an Intel chipset with an ICH8 or later southbridge with SPI flash
299attached, and if a valid descriptor was written to it (e.g. by the vendor), the
300chipset provides an alternative way to access the flash chip(s) named
301.BR "Hardware Sequencing" .
302It is much simpler than the normal access method (called
303.BR "Software Sequencing" "),"
304but does not allow the software to choose the SPI commands to be sent.
305You can use the
306.sp
307.B " flashrom \-p internal:ich_spi_mode=value"
308.sp
309syntax where value can be
310.BR auto ", " swseq " or " hwseq .
311By default
312.RB "(or when setting " ich_spi_mode=auto )
313the module tries to use swseq and only activates hwseq if need be (e.g. if
314important opcodes are inaccessible due to lockdown; or if more than one flash
315chip is attached). The other options (swseq, hwseq) select the respective mode
316(if possible).
317.sp
318If you have an Intel chipset with an ICH6 or later southbridge and if you want
319to set specific IDSEL values for a non-default flash chip or an embedded
320controller (EC), you can use the
321.sp
322.B " flashrom \-p internal:fwh_idsel=value"
323.sp
324syntax where value is the 48-bit hexadecimal raw value to be written in the
325IDSEL registers of the Intel southbridge. The upper 32 bits use one hex digit
326each per 512 kB range between 0xffc00000 and 0xffffffff, and the lower 16 bits
327use one hex digit each per 1024 kB range between 0xff400000 and 0xff7fffff.
328The rightmost hex digit corresponds with the lowest address range. All address
329ranges have a corresponding sister range 4 MB below with identical IDSEL
330settings. The default value for ICH7 is given in the example below.
331.sp
332Example:
333.B "flashrom \-p internal:fwh_idsel=0x001122334567"
334.sp
335Using flashrom on laptops is dangerous and may easily make your hardware
336unusable (see also the
337.B BUGS
338section). The embedded controller (EC) in these
339machines often interacts badly with flashing.
340.B http://www.flashrom.org/Laptops
341has more information. If flash is shared with the EC, erase is guaranteed to
342brick your laptop and write is very likely to brick your laptop.
343Chip read and probe may irritate your EC and cause fan failure, backlight
344failure, sudden poweroff, and other nasty effects.
345flashrom will attempt to detect laptops and abort immediately for safety
346reasons.
347If you want to proceed anyway at your own risk, use
348.sp
349.B " flashrom \-p internal:laptop=force_I_want_a_brick"
350.sp
351You have been warned.
352.sp
353We will not help you if you force flashing on a laptop because this is a really
354dumb idea.
355.TP
356.BR "dummy " programmer
357The dummy programmer operates on a buffer in memory only. It provides a safe
358and fast way to test various aspects of flashrom and is mainly used in
359development and while debugging.
360.sp
361It is able to emulate some chips to a certain degree (basic
362identify/read/erase/write operations work).
363.sp
364An optional parameter specifies the bus types it
365should support. For that you have to use the
366.sp
367.B " flashrom \-p dummy:bus=[type[+type[+type]]]"
368.sp
369syntax where
370.B type
371can be
372.BR parallel ", " lpc ", " fwh ", " spi
373in any order. If you specify bus without type, all buses will be disabled.
374If you do not specify bus, all buses will be enabled.
375.sp
376Example:
377.B "flashrom \-p dummy:bus=lpc+fwh"
378.sp
379The dummy programmer supports flash chip emulation for automated self-tests
380without hardware access. If you want to emulate a flash chip, use the
381.sp
382.B " flashrom \-p dummy:emulate=chip"
383.sp
384syntax where
385.B chip
386is one of the following chips (please specify only the chip name, not the
387vendor):
388.sp
389.RB "* ST " M25P10.RES " SPI flash chip (RES, page write)"
390.sp
391.RB "* SST " SST25VF040.REMS " SPI flash chip (REMS, byte write)"
392.sp
393.RB "* SST " SST25VF032B " SPI flash chip (RDID, AAI write)"
394.sp
395Example:
396.B "flashrom -p dummy:emulate=SST25VF040.REMS"
397.sp
398If you use flash chip emulation, flash image persistence is available as well
399by using the
400.sp
401.B " flashrom \-p dummy:emulate=chip,image=image.rom"
402.sp
403syntax where
404.B image.rom
405is the file where the simulated chip contents are read on flashrom startup and
406where the chip contents on flashrom shutdown are written to.
407.sp
408Example:
409.B "flashrom -p dummy:emulate=M25P10.RES,image=dummy.bin"
410.sp
411If you use SPI flash chip emulation for a chip which supports SPI page write
412with the default opcode, you can set the maximum allowed write chunk size with
413the
414.sp
415.B " flashrom \-p dummy:emulate=chip,spi_write_256_chunksize=size"
416.sp
417syntax where
418.B size
419is the number of bytes (min. 1, max. 256).
420.sp
421Example:
422.sp
423.B " flashrom -p dummy:emulate=M25P10.RES,spi_write_256_chunksize=5"
424.sp
425To simulate a programmer which refuses to send certain SPI commands to the
426flash chip, you can specify a blacklist of SPI commands with the
427.sp
428.B " flashrom -p dummy:spi_blacklist=commandlist"
429.sp
430syntax where commandlist is a list of two-digit hexadecimal representations of
431SPI commands. If commandlist is e.g. 0302, flashrom will behave as if the SPI
432controller refuses to run command 0x03 (READ) and command 0x02 (WRITE).
433commandlist may be up to 512 characters (256 commands) long.
434Implementation note: flashrom will detect an error during command execution.
435.sp
436To simulate a flash chip which ignores (doesn't support) certain SPI commands,
437you can specify an ignorelist of SPI commands with the
438.sp
439.B " flashrom -p dummy:spi_ignorelist=commandlist"
440.sp
441syntax where commandlist is a list of two-digit hexadecimal representations of
442SPI commands. If commandlist is e.g. 0302, the emulated flash chip will ignore
443command 0x03 (READ) and command 0x02 (WRITE). commandlist may be up to 512
444characters (256 commands) long.
445Implementation note: flashrom won't detect an error during command execution.
446.TP
447.BR "nic3com" , " nicrealtek" , " nicsmc1211" , " nicnatsemi" , " nicintel\
448" , " nicintel_spi" , " gfxnvidia" , " ogp_spi" , " drkaiser" , " satasii\
449" , " satamv" ", and " atahpt " programmers
450These programmers have an option to specify the PCI address of the card
451your want to use, which must be specified if more than one card supported
452by the selected programmer is installed in your system. The syntax is
453.sp
454.BR " flashrom \-p xxxx:pci=bb:dd.f" ,
455.sp
456where
457.B xxxx
458is the name of the programmer
459.B bb
460is the PCI bus number,
461.B dd
462is the PCI device number, and
463.B f
464is the PCI function number of the desired device.
465.sp
466Example:
467.B "flashrom \-p nic3com:pci=05:04.0"
468.TP
469.BR "ft2232_spi " programmer
470An optional parameter specifies the controller
471type and interface/port it should support. For that you have to use the
472.sp
473.B " flashrom \-p ft2232_spi:type=model,port=interface"
474.sp
475syntax where
476.B model
477can be
478.BR 2232H ", " 4232H ", " jtagkey ", " busblaster ", " openmoko ", " \
479arm-usb-tiny ", " arm-usb-tiny-h ", " arm-usb-ocd ", " arm-usb-ocd-h \
480", " tumpa ", or " picotap
481and
482.B interface
483can be
484.BR A ", or " B .
485The default model is
486.B 4232H
487and the default interface is
488.BR B .
489.TP
490.BR "serprog " programmer
491A mandatory parameter specifies either a serial
492device/baud combination or an IP/port combination for communication with the
493programmer. In the device/baud combination, the device has to start with a
494slash. For serial, you have to use the
495.sp
496.B " flashrom \-p serprog:dev=/dev/device:baud"
497.sp
498syntax and for IP, you have to use
499.sp
500.B " flashrom \-p serprog:ip=ipaddr:port"
501.sp
502instead. More information about serprog is available in
503.B serprog-protocol.txt
504in the source distribution.
505.TP
506.BR "buspirate_spi " programmer
507A required
508.B dev
509parameter specifies the Bus Pirate device node and an optional
510.B spispeed
511parameter specifies the frequency of the SPI bus. The parameter
512delimiter is a comma. Syntax is
513.sp
514.B " flashrom \-p buspirate_spi:dev=/dev/device,spispeed=frequency"
515.sp
516where
517.B frequency
518can be
519.BR 30k ", " 125k ", " 250k ", " 1M ", " 2M ", " 2.6M ", " 4M " or " 8M
520(in Hz). The default is the maximum frequency of 8 MHz.
521.TP
522.BR "dediprog " programmer
523An optional
524.B voltage
525parameter specifies the voltage the Dediprog should use. The default unit is
526Volt if no unit is specified. You can use
527.BR mV ", " milliVolt ", " V " or " Volt
528as unit specifier. Syntax is
529.sp
530.B " flashrom \-p dediprog:voltage=value"
531.sp
532where
533.B value
534can be
535.BR 0V ", " 1.8V ", " 2.5V ", " 3.5V
536or the equivalent in mV.
537.TP
538.BR "rayer_spi " programmer
539The default I/O base address used for the parallel port is 0x378 and you can use
540the optional
541.B iobase
542parameter to specify an alternate base I/O address with the
543.sp
544.B " flashrom \-p rayer_spi:iobase=baseaddr"
545.sp
546syntax where
547.B baseaddr
548is base I/O port address of the parallel port, which must be a multiple of
549four. Make sure to not forget the "0x" prefix for hexadecimal port addresses.
550.sp
551The default cable type is the RayeR cable. You can use the optional
552.B type
553parameter to specify the cable type with the
554.sp
555.B " flashrom \-p rayer_spi:type=model"
556.sp
557syntax where
558.B model
559can be
560.BR rayer " for the RayeR cable or " xilinx " for the Xilinx Parallel Cable III
561(DLC 5).
562.sp
563More information about the RayeR hardware is available at
564.BR "http://rayer.ic.cz/elektro/spipgm.htm " .
565The schematic of the Xilinx DLC 5 was published at
566.BR "http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html " .
567.TP
568.BR "ogp_spi " programmer
569The flash ROM chip to access must be specified with the
570.B rom
571parameter.
572.sp
573.B " flashrom \-p ogp_spi:rom=name"
574.sp
575Where
576.B name
577is either
578.B cprom
579or
580.B s3
581for the configuration ROM and
582.B bprom
583or
584.B bios
585for the BIOS ROM. If more than one card supported by the ogp_spi programmer
586is installed in your system, you have to specify the PCI address of the card
587you want to use with the
588.B pci=
589parameter as explained in the
590.B nic3com
591section above.
592.sp
593More information about the hardware is available at
594.BR http://wiki.opengraphics.org .
595.SH EXIT STATUS
596flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem
597(/dev/xsvc on Solaris) can not be opened and with 3 if a call to mmap() fails.
598.SH REQUIREMENTS
599flashrom needs different access permissions for different programmers.
600.sp
601.B internal
602needs raw memory access, PCI configuration space access, raw I/O port
603access (x86) and MSR access (x86).
604.sp
605.BR nic3com ", " nicrealtek ", " nicsmc1211 " and " nicnatsemi "
606need PCI configuration space read access and raw I/O port access.
607.sp
608.B atahpt
609needs PCI configuration space access and raw I/O port access.
610.sp
611.BR gfxnvidia " and " drkaiser
612need PCI configuration space access and raw memory access.
613.sp
614.B rayer_spi
615needs raw I/O port access.
616.sp
617.B satasii
618needs PCI configuration space read access and raw memory access.
619.sp
620.B satamv
621needs PCI configuration space read access, raw I/O port access and raw memory
622access.
623.sp
624.B serprog
625needs TCP access to the network or userspace access to a serial port.
626.sp
627.B buspirate_spi
628needs userspace access to a serial port.
629.sp
630.BR dediprog " and " ft2232_spi
631need access to the USB device via libusb.
632.sp
633.B dummy
634needs no access permissions at all.
635.sp
636.BR internal ", " nic3com ", " nicrealtek ", " nicsmc1211 ", " nicnatsemi ", "
637.BR gfxnvidia ", " drkaiser ", " satasii ", " satamv " and " atahpt
638have to be run as superuser/root, and need additional raw access permission.
639.sp
640.BR serprog ", " buspirate_spi ", " dediprog " and " ft2232_spi
641can be run as normal user on most operating systems if appropriate device
642permissions are set.
643.sp
644.B ogp
645needs PCI configuration space read access and raw memory access.
646.sp
647On OpenBSD, you can obtain raw access permission by setting
648.B "securelevel=-1"
649in
650.B "/etc/rc.securelevel"
651and rebooting, or rebooting into single user mode.
652.SH BUGS
653Please report any bugs at
654.sp
655.B " http://www.flashrom.org/trac/flashrom/newticket"
656.sp
657or on the flashrom mailing list at
658.B "<flashrom@flashrom.org>"
659.sp
660We recommend to subscribe first at
661.sp
662.B " http://www.flashrom.org/mailman/listinfo/flashrom"
663.sp
664Using flashrom on laptops is dangerous and may easily make your hardware
665unusable unless you can desolder the flash chip and have a full flash chip
666backup. This is caused by the embedded controller (EC) present in many laptops,
667which interacts badly with any flash attempts. This is a hardware limitation
668and flashrom will attempt to detect it and abort immediately for safety reasons.
669.sp
670More information about flashrom on laptops is available from
671.sp
672.B " http://www.flashrom.org/Laptops"
673.SH LICENSE
674.B flashrom
675is covered by the GNU General Public License (GPL), version 2. Some files are
676additionally available under the GPL (version 2, or any later version).
677.SH COPYRIGHT
678.br
679Please see the individual files.
680.SH AUTHORS
681Andrew Morgan
682.br
683Carl-Daniel Hailfinger
684.br
685Claus Gindhart
686.br
687David Borg
688.br
689David Hendricks
690.br
691Dominik Geyer
692.br
693Eric Biederman
694.br
695Giampiero Giancipoli
696.br
697Helge Wagner
698.br
699Idwer Vollering
700.br
701Joe Bao
702.br
703Joerg Fischer
704.br
705Joshua Roys
706.br
707Luc Verhaegen
708.br
709Li-Ta Lo
710.br
711Mark Marshall
712.br
713Markus Boas
714.br
715Mattias Mattsson
716.br
717Michael Karcher
718.br
719Nikolay Petukhov
720.br
721Patrick Georgi
722.br
723Peter Lemenkov
724.br
725Peter Stuge
726.br
727Reinder E.N. de Haan
728.br
729Ronald G. Minnich
730.br
731Ronald Hoogenboom
732.br
733Sean Nelson
734.br
735Stefan Reinauer
736.br
737Stefan Tauner
738.br
739Stefan Wildemann
740.br
741Stephan Guilloux
742.br
743Steven James
744.br
745Uwe Hermann
746.br
747Wang Qingpei
748.br
749Yinghai Lu
750.br
751some others, please see the flashrom svn changelog for details.
752.br
753All authors can be reached via email at <flashrom@flashrom.org>.
754.PP
755This manual page was written by Uwe Hermann <uwe@hermann-uwe.de>,
756Carl-Daniel Hailfinger and others.
757It is licensed under the terms of the GNU GPL (version 2 or later).
758

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