Flashrom

Flashrom Svn Source Tree

Root/trunk/dummyflasher.c

1/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2009,2010 Carl-Daniel Hailfinger
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include <string.h>
21#include <stdlib.h>
22#include <stdio.h>
23#include <ctype.h>
24#include "flash.h"
25#include "chipdrivers.h"
26#include "programmer.h"
27
28/* Remove the #define below if you don't want SPI flash chip emulation. */
29#define EMULATE_SPI_CHIP 1
30
31#if EMULATE_SPI_CHIP
32#define EMULATE_CHIP 1
33#include "spi.h"
34#endif
35
36#if EMULATE_CHIP
37#include <sys/types.h>
38#include <sys/stat.h>
39#endif
40
41#if EMULATE_CHIP
42static uint8_t *flashchip_contents = NULL;
43enum emu_chip {
44EMULATE_NONE,
45EMULATE_ST_M25P10_RES,
46EMULATE_SST_SST25VF040_REMS,
47EMULATE_SST_SST25VF032B,
48};
49static enum emu_chip emu_chip = EMULATE_NONE;
50static char *emu_persistent_image = NULL;
51static unsigned int emu_chip_size = 0;
52#if EMULATE_SPI_CHIP
53static unsigned int emu_max_byteprogram_size = 0;
54static unsigned int emu_max_aai_size = 0;
55static unsigned int emu_jedec_se_size = 0;
56static unsigned int emu_jedec_be_52_size = 0;
57static unsigned int emu_jedec_be_d8_size = 0;
58static unsigned int emu_jedec_ce_60_size = 0;
59static unsigned int emu_jedec_ce_c7_size = 0;
60unsigned char spi_blacklist[256];
61unsigned char spi_ignorelist[256];
62int spi_blacklist_size = 0;
63int spi_ignorelist_size = 0;
64#endif
65#endif
66
67static unsigned int spi_write_256_chunksize = 256;
68
69static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt,
70 unsigned int readcnt,
71 const unsigned char *writearr,
72 unsigned char *readarr);
73static int dummy_spi_write_256(struct flashctx *flash, uint8_t *buf,
74 unsigned int start, unsigned int len);
75static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val,
76 chipaddr addr);
77static void dummy_chip_writew(const struct flashctx *flash, uint16_t val,
78 chipaddr addr);
79static void dummy_chip_writel(const struct flashctx *flash, uint32_t val,
80 chipaddr addr);
81static void dummy_chip_writen(const struct flashctx *flash, uint8_t *buf,
82 chipaddr addr, size_t len);
83static uint8_t dummy_chip_readb(const struct flashctx *flash,
84const chipaddr addr);
85static uint16_t dummy_chip_readw(const struct flashctx *flash,
86 const chipaddr addr);
87static uint32_t dummy_chip_readl(const struct flashctx *flash,
88 const chipaddr addr);
89static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf,
90 const chipaddr addr, size_t len);
91
92static const struct spi_programmer spi_programmer_dummyflasher = {
93.type= SPI_CONTROLLER_DUMMY,
94.max_data_read= MAX_DATA_READ_UNLIMITED,
95.max_data_write= MAX_DATA_UNSPECIFIED,
96.command= dummy_spi_send_command,
97.multicommand= default_spi_send_multicommand,
98.read= default_spi_read,
99.write_256= dummy_spi_write_256,
100};
101
102static const struct par_programmer par_programmer_dummy = {
103.chip_readb= dummy_chip_readb,
104.chip_readw= dummy_chip_readw,
105.chip_readl= dummy_chip_readl,
106.chip_readn= dummy_chip_readn,
107.chip_writeb= dummy_chip_writeb,
108.chip_writew= dummy_chip_writew,
109.chip_writel= dummy_chip_writel,
110.chip_writen= dummy_chip_writen,
111};
112
113enum chipbustype dummy_buses_supported = BUS_NONE;
114
115static int dummy_shutdown(void *data)
116{
117msg_pspew("%s\n", __func__);
118#if EMULATE_CHIP
119if (emu_chip != EMULATE_NONE) {
120if (emu_persistent_image) {
121msg_pdbg("Writing %s\n", emu_persistent_image);
122write_buf_to_file(flashchip_contents, emu_chip_size,
123 emu_persistent_image);
124}
125free(flashchip_contents);
126}
127#endif
128return 0;
129}
130
131int dummy_init(void)
132{
133char *bustext = NULL;
134char *tmp = NULL;
135int i;
136#if EMULATE_CHIP
137struct stat image_stat;
138#endif
139
140msg_pspew("%s\n", __func__);
141
142bustext = extract_programmer_param("bus");
143msg_pdbg("Requested buses are: %s\n", bustext ? bustext : "default");
144if (!bustext)
145bustext = strdup("parallel+lpc+fwh+spi");
146/* Convert the parameters to lowercase. */
147tolower_string(bustext);
148
149dummy_buses_supported = BUS_NONE;
150if (strstr(bustext, "parallel")) {
151dummy_buses_supported |= BUS_PARALLEL;
152msg_pdbg("Enabling support for %s flash.\n", "parallel");
153}
154if (strstr(bustext, "lpc")) {
155dummy_buses_supported |= BUS_LPC;
156msg_pdbg("Enabling support for %s flash.\n", "LPC");
157}
158if (strstr(bustext, "fwh")) {
159dummy_buses_supported |= BUS_FWH;
160msg_pdbg("Enabling support for %s flash.\n", "FWH");
161}
162if (strstr(bustext, "spi")) {
163dummy_buses_supported |= BUS_SPI;
164msg_pdbg("Enabling support for %s flash.\n", "SPI");
165}
166if (dummy_buses_supported == BUS_NONE)
167msg_pdbg("Support for all flash bus types disabled.\n");
168free(bustext);
169
170tmp = extract_programmer_param("spi_write_256_chunksize");
171if (tmp) {
172spi_write_256_chunksize = atoi(tmp);
173free(tmp);
174if (spi_write_256_chunksize < 1) {
175msg_perr("invalid spi_write_256_chunksize\n");
176return 1;
177}
178}
179
180tmp = extract_programmer_param("spi_blacklist");
181if (tmp) {
182i = strlen(tmp);
183if (!strncmp(tmp, "0x", 2)) {
184i -= 2;
185memmove(tmp, tmp + 2, i + 1);
186}
187if ((i > 512) || (i % 2)) {
188msg_perr("Invalid SPI command blacklist length\n");
189free(tmp);
190return 1;
191}
192spi_blacklist_size = i / 2;
193for (i = 0; i < spi_blacklist_size * 2; i++) {
194if (!isxdigit((unsigned char)tmp[i])) {
195msg_perr("Invalid char \"%c\" in SPI command "
196 "blacklist\n", tmp[i]);
197free(tmp);
198return 1;
199}
200}
201for (i = 0; i < spi_blacklist_size; i++) {
202sscanf(tmp + i * 2, "%2hhx", &spi_blacklist[i]);
203}
204msg_pdbg("SPI blacklist is ");
205for (i = 0; i < spi_blacklist_size; i++)
206msg_pdbg("%02x ", spi_blacklist[i]);
207msg_pdbg(", size %i\n", spi_blacklist_size);
208}
209free(tmp);
210
211tmp = extract_programmer_param("spi_ignorelist");
212if (tmp) {
213i = strlen(tmp);
214if (!strncmp(tmp, "0x", 2)) {
215i -= 2;
216memmove(tmp, tmp + 2, i + 1);
217}
218if ((i > 512) || (i % 2)) {
219msg_perr("Invalid SPI command ignorelist length\n");
220free(tmp);
221return 1;
222}
223spi_ignorelist_size = i / 2;
224for (i = 0; i < spi_ignorelist_size * 2; i++) {
225if (!isxdigit((unsigned char)tmp[i])) {
226msg_perr("Invalid char \"%c\" in SPI command "
227 "ignorelist\n", tmp[i]);
228free(tmp);
229return 1;
230}
231}
232for (i = 0; i < spi_ignorelist_size; i++) {
233sscanf(tmp + i * 2, "%2hhx", &spi_ignorelist[i]);
234}
235msg_pdbg("SPI ignorelist is ");
236for (i = 0; i < spi_ignorelist_size; i++)
237msg_pdbg("%02x ", spi_ignorelist[i]);
238msg_pdbg(", size %i\n", spi_ignorelist_size);
239}
240free(tmp);
241
242#if EMULATE_CHIP
243tmp = extract_programmer_param("emulate");
244if (!tmp) {
245msg_pdbg("Not emulating any flash chip.\n");
246/* Nothing else to do. */
247goto dummy_init_out;
248}
249#if EMULATE_SPI_CHIP
250if (!strcmp(tmp, "M25P10.RES")) {
251emu_chip = EMULATE_ST_M25P10_RES;
252emu_chip_size = 128 * 1024;
253emu_max_byteprogram_size = 128;
254emu_max_aai_size = 0;
255emu_jedec_se_size = 0;
256emu_jedec_be_52_size = 0;
257emu_jedec_be_d8_size = 32 * 1024;
258emu_jedec_ce_60_size = 0;
259emu_jedec_ce_c7_size = emu_chip_size;
260msg_pdbg("Emulating ST M25P10.RES SPI flash chip (RES, page "
261 "write)\n");
262}
263if (!strcmp(tmp, "SST25VF040.REMS")) {
264emu_chip = EMULATE_SST_SST25VF040_REMS;
265emu_chip_size = 512 * 1024;
266emu_max_byteprogram_size = 1;
267emu_max_aai_size = 0;
268emu_jedec_se_size = 4 * 1024;
269emu_jedec_be_52_size = 32 * 1024;
270emu_jedec_be_d8_size = 0;
271emu_jedec_ce_60_size = emu_chip_size;
272emu_jedec_ce_c7_size = 0;
273msg_pdbg("Emulating SST SST25VF040.REMS SPI flash chip (REMS, "
274 "byte write)\n");
275}
276if (!strcmp(tmp, "SST25VF032B")) {
277emu_chip = EMULATE_SST_SST25VF032B;
278emu_chip_size = 4 * 1024 * 1024;
279emu_max_byteprogram_size = 1;
280emu_max_aai_size = 2;
281emu_jedec_se_size = 4 * 1024;
282emu_jedec_be_52_size = 32 * 1024;
283emu_jedec_be_d8_size = 64 * 1024;
284emu_jedec_ce_60_size = emu_chip_size;
285emu_jedec_ce_c7_size = emu_chip_size;
286msg_pdbg("Emulating SST SST25VF032B SPI flash chip (RDID, AAI "
287 "write)\n");
288}
289#endif
290if (emu_chip == EMULATE_NONE) {
291msg_perr("Invalid chip specified for emulation: %s\n", tmp);
292free(tmp);
293return 1;
294}
295free(tmp);
296flashchip_contents = malloc(emu_chip_size);
297if (!flashchip_contents) {
298msg_perr("Out of memory!\n");
299return 1;
300}
301
302msg_pdbg("Filling fake flash chip with 0xff, size %i\n", emu_chip_size);
303memset(flashchip_contents, 0xff, emu_chip_size);
304
305emu_persistent_image = extract_programmer_param("image");
306if (!emu_persistent_image) {
307/* Nothing else to do. */
308goto dummy_init_out;
309}
310if (!stat(emu_persistent_image, &image_stat)) {
311msg_pdbg("Found persistent image %s, size %li ",
312 emu_persistent_image, (long)image_stat.st_size);
313if (image_stat.st_size == emu_chip_size) {
314msg_pdbg("matches.\n");
315msg_pdbg("Reading %s\n", emu_persistent_image);
316read_buf_from_file(flashchip_contents, emu_chip_size,
317 emu_persistent_image);
318} else {
319msg_pdbg("doesn't match.\n");
320}
321}
322#endif
323
324dummy_init_out:
325if (register_shutdown(dummy_shutdown, NULL)) {
326free(flashchip_contents);
327return 1;
328}
329if (dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH))
330register_par_programmer(&par_programmer_dummy,
331dummy_buses_supported &
332(BUS_PARALLEL | BUS_LPC |
333 BUS_FWH));
334if (dummy_buses_supported & BUS_SPI)
335register_spi_programmer(&spi_programmer_dummyflasher);
336
337return 0;
338}
339
340void *dummy_map(const char *descr, unsigned long phys_addr, size_t len)
341{
342msg_pspew("%s: Mapping %s, 0x%lx bytes at 0x%08lx\n",
343 __func__, descr, (unsigned long)len, phys_addr);
344return (void *)phys_addr;
345}
346
347void dummy_unmap(void *virt_addr, size_t len)
348{
349msg_pspew("%s: Unmapping 0x%lx bytes at %p\n",
350 __func__, (unsigned long)len, virt_addr);
351}
352
353static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val,
354 chipaddr addr)
355{
356msg_pspew("%s: addr=0x%lx, val=0x%02x\n", __func__, addr, val);
357}
358
359static void dummy_chip_writew(const struct flashctx *flash, uint16_t val,
360 chipaddr addr)
361{
362msg_pspew("%s: addr=0x%lx, val=0x%04x\n", __func__, addr, val);
363}
364
365static void dummy_chip_writel(const struct flashctx *flash, uint32_t val,
366 chipaddr addr)
367{
368msg_pspew("%s: addr=0x%lx, val=0x%08x\n", __func__, addr, val);
369}
370
371static void dummy_chip_writen(const struct flashctx *flash, uint8_t *buf,
372 chipaddr addr, size_t len)
373{
374size_t i;
375msg_pspew("%s: addr=0x%lx, len=0x%08lx, writing data (hex):",
376 __func__, addr, (unsigned long)len);
377for (i = 0; i < len; i++) {
378if ((i % 16) == 0)
379msg_pspew("\n");
380msg_pspew("%02x ", buf[i]);
381}
382}
383
384static uint8_t dummy_chip_readb(const struct flashctx *flash,
385const chipaddr addr)
386{
387msg_pspew("%s: addr=0x%lx, returning 0xff\n", __func__, addr);
388return 0xff;
389}
390
391static uint16_t dummy_chip_readw(const struct flashctx *flash,
392 const chipaddr addr)
393{
394msg_pspew("%s: addr=0x%lx, returning 0xffff\n", __func__, addr);
395return 0xffff;
396}
397
398static uint32_t dummy_chip_readl(const struct flashctx *flash,
399 const chipaddr addr)
400{
401msg_pspew("%s: addr=0x%lx, returning 0xffffffff\n", __func__, addr);
402return 0xffffffff;
403}
404
405static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf,
406 const chipaddr addr, size_t len)
407{
408msg_pspew("%s: addr=0x%lx, len=0x%lx, returning array of 0xff\n",
409 __func__, addr, (unsigned long)len);
410memset(buf, 0xff, len);
411return;
412}
413
414#if EMULATE_SPI_CHIP
415static int emulate_spi_chip_response(unsigned int writecnt,
416 unsigned int readcnt,
417 const unsigned char *writearr,
418 unsigned char *readarr)
419{
420unsigned int offs, i;
421static int unsigned aai_offs;
422static int aai_active = 0;
423
424if (writecnt == 0) {
425msg_perr("No command sent to the chip!\n");
426return 1;
427}
428/* spi_blacklist has precedence before spi_ignorelist. */
429for (i = 0; i < spi_blacklist_size; i++) {
430if (writearr[0] == spi_blacklist[i]) {
431msg_pdbg("Refusing blacklisted SPI command 0x%02x\n",
432 spi_blacklist[i]);
433return SPI_INVALID_OPCODE;
434}
435}
436for (i = 0; i < spi_ignorelist_size; i++) {
437if (writearr[0] == spi_ignorelist[i]) {
438msg_cdbg("Ignoring ignorelisted SPI command 0x%02x\n",
439 spi_ignorelist[i]);
440/* Return success because the command does not fail,
441 * it is simply ignored.
442 */
443return 0;
444}
445}
446switch (writearr[0]) {
447case JEDEC_RES:
448if (emu_chip != EMULATE_ST_M25P10_RES)
449break;
450/* Respond with ST_M25P10_RES. */
451if (readcnt > 0)
452readarr[0] = 0x10;
453break;
454case JEDEC_REMS:
455if (emu_chip != EMULATE_SST_SST25VF040_REMS)
456break;
457/* Respond with SST_SST25VF040_REMS. */
458if (readcnt > 0)
459readarr[0] = 0xbf;
460if (readcnt > 1)
461readarr[1] = 0x44;
462break;
463case JEDEC_RDID:
464if (emu_chip != EMULATE_SST_SST25VF032B)
465break;
466/* Respond with SST_SST25VF032B. */
467if (readcnt > 0)
468readarr[0] = 0xbf;
469if (readcnt > 1)
470readarr[1] = 0x25;
471if (readcnt > 2)
472readarr[2] = 0x4a;
473break;
474case JEDEC_RDSR:
475memset(readarr, 0, readcnt);
476if (aai_active)
477memset(readarr, 1 << 6, readcnt);
478break;
479case JEDEC_READ:
480offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
481/* Truncate to emu_chip_size. */
482offs %= emu_chip_size;
483if (readcnt > 0)
484memcpy(readarr, flashchip_contents + offs, readcnt);
485break;
486case JEDEC_BYTE_PROGRAM:
487offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
488/* Truncate to emu_chip_size. */
489offs %= emu_chip_size;
490if (writecnt < 5) {
491msg_perr("BYTE PROGRAM size too short!\n");
492return 1;
493}
494if (writecnt - 4 > emu_max_byteprogram_size) {
495msg_perr("Max BYTE PROGRAM size exceeded!\n");
496return 1;
497}
498memcpy(flashchip_contents + offs, writearr + 4, writecnt - 4);
499break;
500case JEDEC_AAI_WORD_PROGRAM:
501if (!emu_max_aai_size)
502break;
503if (!aai_active) {
504if (writecnt < JEDEC_AAI_WORD_PROGRAM_OUTSIZE) {
505msg_perr("Initial AAI WORD PROGRAM size too "
506 "short!\n");
507return 1;
508}
509if (writecnt > JEDEC_AAI_WORD_PROGRAM_OUTSIZE) {
510msg_perr("Initial AAI WORD PROGRAM size too "
511 "long!\n");
512return 1;
513}
514aai_active = 1;
515aai_offs = writearr[1] << 16 | writearr[2] << 8 |
516 writearr[3];
517/* Truncate to emu_chip_size. */
518aai_offs %= emu_chip_size;
519memcpy(flashchip_contents + aai_offs, writearr + 4, 2);
520aai_offs += 2;
521} else {
522if (writecnt < JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) {
523msg_perr("Continuation AAI WORD PROGRAM size "
524 "too short!\n");
525return 1;
526}
527if (writecnt > JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) {
528msg_perr("Continuation AAI WORD PROGRAM size "
529 "too long!\n");
530return 1;
531}
532memcpy(flashchip_contents + aai_offs, writearr + 1, 2);
533aai_offs += 2;
534}
535break;
536case JEDEC_WRDI:
537if (!emu_max_aai_size)
538break;
539aai_active = 0;
540break;
541case JEDEC_SE:
542if (!emu_jedec_se_size)
543break;
544if (writecnt != JEDEC_SE_OUTSIZE) {
545msg_perr("SECTOR ERASE 0x20 outsize invalid!\n");
546return 1;
547}
548if (readcnt != JEDEC_SE_INSIZE) {
549msg_perr("SECTOR ERASE 0x20 insize invalid!\n");
550return 1;
551}
552offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
553if (offs & (emu_jedec_se_size - 1))
554msg_pdbg("Unaligned SECTOR ERASE 0x20: 0x%x\n", offs);
555offs &= ~(emu_jedec_se_size - 1);
556memset(flashchip_contents + offs, 0xff, emu_jedec_se_size);
557break;
558case JEDEC_BE_52:
559if (!emu_jedec_be_52_size)
560break;
561if (writecnt != JEDEC_BE_52_OUTSIZE) {
562msg_perr("BLOCK ERASE 0x52 outsize invalid!\n");
563return 1;
564}
565if (readcnt != JEDEC_BE_52_INSIZE) {
566msg_perr("BLOCK ERASE 0x52 insize invalid!\n");
567return 1;
568}
569offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
570if (offs & (emu_jedec_be_52_size - 1))
571msg_pdbg("Unaligned BLOCK ERASE 0x52: 0x%x\n", offs);
572offs &= ~(emu_jedec_be_52_size - 1);
573memset(flashchip_contents + offs, 0xff, emu_jedec_be_52_size);
574break;
575case JEDEC_BE_D8:
576if (!emu_jedec_be_d8_size)
577break;
578if (writecnt != JEDEC_BE_D8_OUTSIZE) {
579msg_perr("BLOCK ERASE 0xd8 outsize invalid!\n");
580return 1;
581}
582if (readcnt != JEDEC_BE_D8_INSIZE) {
583msg_perr("BLOCK ERASE 0xd8 insize invalid!\n");
584return 1;
585}
586offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];
587if (offs & (emu_jedec_be_d8_size - 1))
588msg_pdbg("Unaligned BLOCK ERASE 0xd8: 0x%x\n", offs);
589offs &= ~(emu_jedec_be_d8_size - 1);
590memset(flashchip_contents + offs, 0xff, emu_jedec_be_d8_size);
591break;
592case JEDEC_CE_60:
593if (!emu_jedec_ce_60_size)
594break;
595if (writecnt != JEDEC_CE_60_OUTSIZE) {
596msg_perr("CHIP ERASE 0x60 outsize invalid!\n");
597return 1;
598}
599if (readcnt != JEDEC_CE_60_INSIZE) {
600msg_perr("CHIP ERASE 0x60 insize invalid!\n");
601return 1;
602}
603/* JEDEC_CE_60_OUTSIZE is 1 (no address) -> no offset. */
604/* emu_jedec_ce_60_size is emu_chip_size. */
605memset(flashchip_contents, 0xff, emu_jedec_ce_60_size);
606break;
607case JEDEC_CE_C7:
608if (!emu_jedec_ce_c7_size)
609break;
610if (writecnt != JEDEC_CE_C7_OUTSIZE) {
611msg_perr("CHIP ERASE 0xc7 outsize invalid!\n");
612return 1;
613}
614if (readcnt != JEDEC_CE_C7_INSIZE) {
615msg_perr("CHIP ERASE 0xc7 insize invalid!\n");
616return 1;
617}
618/* JEDEC_CE_C7_OUTSIZE is 1 (no address) -> no offset. */
619/* emu_jedec_ce_c7_size is emu_chip_size. */
620memset(flashchip_contents, 0xff, emu_jedec_ce_c7_size);
621break;
622default:
623/* No special response. */
624break;
625}
626return 0;
627}
628#endif
629
630static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt,
631 unsigned int readcnt,
632 const unsigned char *writearr,
633 unsigned char *readarr)
634{
635int i;
636
637msg_pspew("%s:", __func__);
638
639msg_pspew(" writing %u bytes:", writecnt);
640for (i = 0; i < writecnt; i++)
641msg_pspew(" 0x%02x", writearr[i]);
642
643/* Response for unknown commands and missing chip is 0xff. */
644memset(readarr, 0xff, readcnt);
645#if EMULATE_SPI_CHIP
646switch (emu_chip) {
647case EMULATE_ST_M25P10_RES:
648case EMULATE_SST_SST25VF040_REMS:
649case EMULATE_SST_SST25VF032B:
650if (emulate_spi_chip_response(writecnt, readcnt, writearr,
651 readarr)) {
652msg_pdbg("Invalid command sent to flash chip!\n");
653return 1;
654}
655break;
656default:
657break;
658}
659#endif
660msg_pspew(" reading %u bytes:", readcnt);
661for (i = 0; i < readcnt; i++)
662msg_pspew(" 0x%02x", readarr[i]);
663msg_pspew("\n");
664return 0;
665}
666
667static int dummy_spi_write_256(struct flashctx *flash, uint8_t *buf,
668 unsigned int start, unsigned int len)
669{
670return spi_write_chunked(flash, buf, start, len,
671 spi_write_256_chunksize);
672}
673

Archive Download this file

Revision: HEAD