| 1 | /*␊ |
| 2 | * This file is part of the flashrom project.␊ |
| 3 | *␊ |
| 4 | * Copyright (C) 2009,2010 Carl-Daniel Hailfinger␊ |
| 5 | *␊ |
| 6 | * This program is free software; you can redistribute it and/or modify␊ |
| 7 | * it under the terms of the GNU General Public License as published by␊ |
| 8 | * the Free Software Foundation; version 2 of the License.␊ |
| 9 | *␊ |
| 10 | * This program is distributed in the hope that it will be useful,␊ |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of␊ |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the␊ |
| 13 | * GNU General Public License for more details.␊ |
| 14 | *␊ |
| 15 | * You should have received a copy of the GNU General Public License␊ |
| 16 | * along with this program; if not, write to the Free Software␊ |
| 17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA␊ |
| 18 | */␊ |
| 19 | ␊ |
| 20 | #include <string.h>␊ |
| 21 | #include <stdlib.h>␊ |
| 22 | #include <stdio.h>␊ |
| 23 | #include <ctype.h>␊ |
| 24 | #include "flash.h"␊ |
| 25 | #include "chipdrivers.h"␊ |
| 26 | #include "programmer.h"␊ |
| 27 | ␊ |
| 28 | /* Remove the #define below if you don't want SPI flash chip emulation. */␊ |
| 29 | #define EMULATE_SPI_CHIP 1␊ |
| 30 | ␊ |
| 31 | #if EMULATE_SPI_CHIP␊ |
| 32 | #define EMULATE_CHIP 1␊ |
| 33 | #include "spi.h"␊ |
| 34 | #endif␊ |
| 35 | ␊ |
| 36 | #if EMULATE_CHIP␊ |
| 37 | #include <sys/types.h>␊ |
| 38 | #include <sys/stat.h>␊ |
| 39 | #endif␊ |
| 40 | ␊ |
| 41 | #if EMULATE_CHIP␊ |
| 42 | static uint8_t *flashchip_contents = NULL;␊ |
| 43 | enum emu_chip {␊ |
| 44 | ␉EMULATE_NONE,␊ |
| 45 | ␉EMULATE_ST_M25P10_RES,␊ |
| 46 | ␉EMULATE_SST_SST25VF040_REMS,␊ |
| 47 | ␉EMULATE_SST_SST25VF032B,␊ |
| 48 | };␊ |
| 49 | static enum emu_chip emu_chip = EMULATE_NONE;␊ |
| 50 | static char *emu_persistent_image = NULL;␊ |
| 51 | static unsigned int emu_chip_size = 0;␊ |
| 52 | #if EMULATE_SPI_CHIP␊ |
| 53 | static unsigned int emu_max_byteprogram_size = 0;␊ |
| 54 | static unsigned int emu_max_aai_size = 0;␊ |
| 55 | static unsigned int emu_jedec_se_size = 0;␊ |
| 56 | static unsigned int emu_jedec_be_52_size = 0;␊ |
| 57 | static unsigned int emu_jedec_be_d8_size = 0;␊ |
| 58 | static unsigned int emu_jedec_ce_60_size = 0;␊ |
| 59 | static unsigned int emu_jedec_ce_c7_size = 0;␊ |
| 60 | unsigned char spi_blacklist[256];␊ |
| 61 | unsigned char spi_ignorelist[256];␊ |
| 62 | int spi_blacklist_size = 0;␊ |
| 63 | int spi_ignorelist_size = 0;␊ |
| 64 | #endif␊ |
| 65 | #endif␊ |
| 66 | ␊ |
| 67 | static unsigned int spi_write_256_chunksize = 256;␊ |
| 68 | ␊ |
| 69 | static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt,␊ |
| 70 | ␉␉␉␉ unsigned int readcnt,␊ |
| 71 | ␉␉␉␉ const unsigned char *writearr,␊ |
| 72 | ␉␉␉␉ unsigned char *readarr);␊ |
| 73 | static int dummy_spi_write_256(struct flashctx *flash, uint8_t *buf,␊ |
| 74 | ␉␉␉ unsigned int start, unsigned int len);␊ |
| 75 | static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val,␊ |
| 76 | ␉␉␉ chipaddr addr);␊ |
| 77 | static void dummy_chip_writew(const struct flashctx *flash, uint16_t val,␊ |
| 78 | ␉␉␉ chipaddr addr);␊ |
| 79 | static void dummy_chip_writel(const struct flashctx *flash, uint32_t val,␊ |
| 80 | ␉␉␉ chipaddr addr);␊ |
| 81 | static void dummy_chip_writen(const struct flashctx *flash, uint8_t *buf,␊ |
| 82 | ␉␉␉ chipaddr addr, size_t len);␊ |
| 83 | static uint8_t dummy_chip_readb(const struct flashctx *flash,␊ |
| 84 | ␉␉␉␉const chipaddr addr);␊ |
| 85 | static uint16_t dummy_chip_readw(const struct flashctx *flash,␊ |
| 86 | ␉␉␉␉ const chipaddr addr);␊ |
| 87 | static uint32_t dummy_chip_readl(const struct flashctx *flash,␊ |
| 88 | ␉␉␉␉ const chipaddr addr);␊ |
| 89 | static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf,␊ |
| 90 | ␉␉␉ const chipaddr addr, size_t len);␊ |
| 91 | ␊ |
| 92 | static const struct spi_programmer spi_programmer_dummyflasher = {␊ |
| 93 | ␉.type␉␉= SPI_CONTROLLER_DUMMY,␊ |
| 94 | ␉.max_data_read␉= MAX_DATA_READ_UNLIMITED,␊ |
| 95 | ␉.max_data_write␉= MAX_DATA_UNSPECIFIED,␊ |
| 96 | ␉.command␉= dummy_spi_send_command,␊ |
| 97 | ␉.multicommand␉= default_spi_send_multicommand,␊ |
| 98 | ␉.read␉␉= default_spi_read,␊ |
| 99 | ␉.write_256␉= dummy_spi_write_256,␊ |
| 100 | };␊ |
| 101 | ␊ |
| 102 | static const struct par_programmer par_programmer_dummy = {␊ |
| 103 | ␉␉.chip_readb␉␉= dummy_chip_readb,␊ |
| 104 | ␉␉.chip_readw␉␉= dummy_chip_readw,␊ |
| 105 | ␉␉.chip_readl␉␉= dummy_chip_readl,␊ |
| 106 | ␉␉.chip_readn␉␉= dummy_chip_readn,␊ |
| 107 | ␉␉.chip_writeb␉␉= dummy_chip_writeb,␊ |
| 108 | ␉␉.chip_writew␉␉= dummy_chip_writew,␊ |
| 109 | ␉␉.chip_writel␉␉= dummy_chip_writel,␊ |
| 110 | ␉␉.chip_writen␉␉= dummy_chip_writen,␊ |
| 111 | };␊ |
| 112 | ␊ |
| 113 | enum chipbustype dummy_buses_supported = BUS_NONE;␊ |
| 114 | ␊ |
| 115 | static int dummy_shutdown(void *data)␊ |
| 116 | {␊ |
| 117 | ␉msg_pspew("%s\n", __func__);␊ |
| 118 | #if EMULATE_CHIP␊ |
| 119 | ␉if (emu_chip != EMULATE_NONE) {␊ |
| 120 | ␉␉if (emu_persistent_image) {␊ |
| 121 | ␉␉␉msg_pdbg("Writing %s\n", emu_persistent_image);␊ |
| 122 | ␉␉␉write_buf_to_file(flashchip_contents, emu_chip_size,␊ |
| 123 | ␉␉␉␉␉ emu_persistent_image);␊ |
| 124 | ␉␉}␊ |
| 125 | ␉␉free(flashchip_contents);␊ |
| 126 | ␉}␊ |
| 127 | #endif␊ |
| 128 | ␉return 0;␊ |
| 129 | }␊ |
| 130 | ␊ |
| 131 | int dummy_init(void)␊ |
| 132 | {␊ |
| 133 | ␉char *bustext = NULL;␊ |
| 134 | ␉char *tmp = NULL;␊ |
| 135 | ␉int i;␊ |
| 136 | #if EMULATE_CHIP␊ |
| 137 | ␉struct stat image_stat;␊ |
| 138 | #endif␊ |
| 139 | ␊ |
| 140 | ␉msg_pspew("%s\n", __func__);␊ |
| 141 | ␊ |
| 142 | ␉bustext = extract_programmer_param("bus");␊ |
| 143 | ␉msg_pdbg("Requested buses are: %s\n", bustext ? bustext : "default");␊ |
| 144 | ␉if (!bustext)␊ |
| 145 | ␉␉bustext = strdup("parallel+lpc+fwh+spi");␊ |
| 146 | ␉/* Convert the parameters to lowercase. */␊ |
| 147 | ␉tolower_string(bustext);␊ |
| 148 | ␊ |
| 149 | ␉dummy_buses_supported = BUS_NONE;␊ |
| 150 | ␉if (strstr(bustext, "parallel")) {␊ |
| 151 | ␉␉dummy_buses_supported |= BUS_PARALLEL;␊ |
| 152 | ␉␉msg_pdbg("Enabling support for %s flash.\n", "parallel");␊ |
| 153 | ␉}␊ |
| 154 | ␉if (strstr(bustext, "lpc")) {␊ |
| 155 | ␉␉dummy_buses_supported |= BUS_LPC;␊ |
| 156 | ␉␉msg_pdbg("Enabling support for %s flash.\n", "LPC");␊ |
| 157 | ␉}␊ |
| 158 | ␉if (strstr(bustext, "fwh")) {␊ |
| 159 | ␉␉dummy_buses_supported |= BUS_FWH;␊ |
| 160 | ␉␉msg_pdbg("Enabling support for %s flash.\n", "FWH");␊ |
| 161 | ␉}␊ |
| 162 | ␉if (strstr(bustext, "spi")) {␊ |
| 163 | ␉␉dummy_buses_supported |= BUS_SPI;␊ |
| 164 | ␉␉msg_pdbg("Enabling support for %s flash.\n", "SPI");␊ |
| 165 | ␉}␊ |
| 166 | ␉if (dummy_buses_supported == BUS_NONE)␊ |
| 167 | ␉␉msg_pdbg("Support for all flash bus types disabled.\n");␊ |
| 168 | ␉free(bustext);␊ |
| 169 | ␊ |
| 170 | ␉tmp = extract_programmer_param("spi_write_256_chunksize");␊ |
| 171 | ␉if (tmp) {␊ |
| 172 | ␉␉spi_write_256_chunksize = atoi(tmp);␊ |
| 173 | ␉␉free(tmp);␊ |
| 174 | ␉␉if (spi_write_256_chunksize < 1) {␊ |
| 175 | ␉␉␉msg_perr("invalid spi_write_256_chunksize\n");␊ |
| 176 | ␉␉␉return 1;␊ |
| 177 | ␉␉}␊ |
| 178 | ␉}␊ |
| 179 | ␊ |
| 180 | ␉tmp = extract_programmer_param("spi_blacklist");␊ |
| 181 | ␉if (tmp) {␊ |
| 182 | ␉␉i = strlen(tmp);␊ |
| 183 | ␉␉if (!strncmp(tmp, "0x", 2)) {␊ |
| 184 | ␉␉␉i -= 2;␊ |
| 185 | ␉␉␉memmove(tmp, tmp + 2, i + 1);␊ |
| 186 | ␉␉}␊ |
| 187 | ␉␉if ((i > 512) || (i % 2)) {␊ |
| 188 | ␉␉␉msg_perr("Invalid SPI command blacklist length\n");␊ |
| 189 | ␉␉␉free(tmp);␊ |
| 190 | ␉␉␉return 1;␊ |
| 191 | ␉␉}␊ |
| 192 | ␉␉spi_blacklist_size = i / 2;␊ |
| 193 | ␉␉for (i = 0; i < spi_blacklist_size * 2; i++) {␊ |
| 194 | ␉␉␉if (!isxdigit((unsigned char)tmp[i])) {␊ |
| 195 | ␉␉␉␉msg_perr("Invalid char \"%c\" in SPI command "␊ |
| 196 | ␉␉␉␉␉ "blacklist\n", tmp[i]);␊ |
| 197 | ␉␉␉␉free(tmp);␊ |
| 198 | ␉␉␉␉return 1;␊ |
| 199 | ␉␉␉}␊ |
| 200 | ␉␉}␊ |
| 201 | ␉␉for (i = 0; i < spi_blacklist_size; i++) {␊ |
| 202 | ␉␉␉sscanf(tmp + i * 2, "%2hhx", &spi_blacklist[i]);␊ |
| 203 | ␉␉}␊ |
| 204 | ␉␉msg_pdbg("SPI blacklist is ");␊ |
| 205 | ␉␉for (i = 0; i < spi_blacklist_size; i++)␊ |
| 206 | ␉␉␉msg_pdbg("%02x ", spi_blacklist[i]);␊ |
| 207 | ␉␉msg_pdbg(", size %i\n", spi_blacklist_size);␊ |
| 208 | ␉}␊ |
| 209 | ␉free(tmp);␊ |
| 210 | ␊ |
| 211 | ␉tmp = extract_programmer_param("spi_ignorelist");␊ |
| 212 | ␉if (tmp) {␊ |
| 213 | ␉␉i = strlen(tmp);␊ |
| 214 | ␉␉if (!strncmp(tmp, "0x", 2)) {␊ |
| 215 | ␉␉␉i -= 2;␊ |
| 216 | ␉␉␉memmove(tmp, tmp + 2, i + 1);␊ |
| 217 | ␉␉}␊ |
| 218 | ␉␉if ((i > 512) || (i % 2)) {␊ |
| 219 | ␉␉␉msg_perr("Invalid SPI command ignorelist length\n");␊ |
| 220 | ␉␉␉free(tmp);␊ |
| 221 | ␉␉␉return 1;␊ |
| 222 | ␉␉}␊ |
| 223 | ␉␉spi_ignorelist_size = i / 2;␊ |
| 224 | ␉␉for (i = 0; i < spi_ignorelist_size * 2; i++) {␊ |
| 225 | ␉␉␉if (!isxdigit((unsigned char)tmp[i])) {␊ |
| 226 | ␉␉␉␉msg_perr("Invalid char \"%c\" in SPI command "␊ |
| 227 | ␉␉␉␉␉ "ignorelist\n", tmp[i]);␊ |
| 228 | ␉␉␉␉free(tmp);␊ |
| 229 | ␉␉␉␉return 1;␊ |
| 230 | ␉␉␉}␊ |
| 231 | ␉␉}␊ |
| 232 | ␉␉for (i = 0; i < spi_ignorelist_size; i++) {␊ |
| 233 | ␉␉␉sscanf(tmp + i * 2, "%2hhx", &spi_ignorelist[i]);␊ |
| 234 | ␉␉}␊ |
| 235 | ␉␉msg_pdbg("SPI ignorelist is ");␊ |
| 236 | ␉␉for (i = 0; i < spi_ignorelist_size; i++)␊ |
| 237 | ␉␉␉msg_pdbg("%02x ", spi_ignorelist[i]);␊ |
| 238 | ␉␉msg_pdbg(", size %i\n", spi_ignorelist_size);␊ |
| 239 | ␉}␊ |
| 240 | ␉free(tmp);␊ |
| 241 | ␊ |
| 242 | #if EMULATE_CHIP␊ |
| 243 | ␉tmp = extract_programmer_param("emulate");␊ |
| 244 | ␉if (!tmp) {␊ |
| 245 | ␉␉msg_pdbg("Not emulating any flash chip.\n");␊ |
| 246 | ␉␉/* Nothing else to do. */␊ |
| 247 | ␉␉goto dummy_init_out;␊ |
| 248 | ␉}␊ |
| 249 | #if EMULATE_SPI_CHIP␊ |
| 250 | ␉if (!strcmp(tmp, "M25P10.RES")) {␊ |
| 251 | ␉␉emu_chip = EMULATE_ST_M25P10_RES;␊ |
| 252 | ␉␉emu_chip_size = 128 * 1024;␊ |
| 253 | ␉␉emu_max_byteprogram_size = 128;␊ |
| 254 | ␉␉emu_max_aai_size = 0;␊ |
| 255 | ␉␉emu_jedec_se_size = 0;␊ |
| 256 | ␉␉emu_jedec_be_52_size = 0;␊ |
| 257 | ␉␉emu_jedec_be_d8_size = 32 * 1024;␊ |
| 258 | ␉␉emu_jedec_ce_60_size = 0;␊ |
| 259 | ␉␉emu_jedec_ce_c7_size = emu_chip_size;␊ |
| 260 | ␉␉msg_pdbg("Emulating ST M25P10.RES SPI flash chip (RES, page "␊ |
| 261 | ␉␉␉ "write)\n");␊ |
| 262 | ␉}␊ |
| 263 | ␉if (!strcmp(tmp, "SST25VF040.REMS")) {␊ |
| 264 | ␉␉emu_chip = EMULATE_SST_SST25VF040_REMS;␊ |
| 265 | ␉␉emu_chip_size = 512 * 1024;␊ |
| 266 | ␉␉emu_max_byteprogram_size = 1;␊ |
| 267 | ␉␉emu_max_aai_size = 0;␊ |
| 268 | ␉␉emu_jedec_se_size = 4 * 1024;␊ |
| 269 | ␉␉emu_jedec_be_52_size = 32 * 1024;␊ |
| 270 | ␉␉emu_jedec_be_d8_size = 0;␊ |
| 271 | ␉␉emu_jedec_ce_60_size = emu_chip_size;␊ |
| 272 | ␉␉emu_jedec_ce_c7_size = 0;␊ |
| 273 | ␉␉msg_pdbg("Emulating SST SST25VF040.REMS SPI flash chip (REMS, "␊ |
| 274 | ␉␉␉ "byte write)\n");␊ |
| 275 | ␉}␊ |
| 276 | ␉if (!strcmp(tmp, "SST25VF032B")) {␊ |
| 277 | ␉␉emu_chip = EMULATE_SST_SST25VF032B;␊ |
| 278 | ␉␉emu_chip_size = 4 * 1024 * 1024;␊ |
| 279 | ␉␉emu_max_byteprogram_size = 1;␊ |
| 280 | ␉␉emu_max_aai_size = 2;␊ |
| 281 | ␉␉emu_jedec_se_size = 4 * 1024;␊ |
| 282 | ␉␉emu_jedec_be_52_size = 32 * 1024;␊ |
| 283 | ␉␉emu_jedec_be_d8_size = 64 * 1024;␊ |
| 284 | ␉␉emu_jedec_ce_60_size = emu_chip_size;␊ |
| 285 | ␉␉emu_jedec_ce_c7_size = emu_chip_size;␊ |
| 286 | ␉␉msg_pdbg("Emulating SST SST25VF032B SPI flash chip (RDID, AAI "␊ |
| 287 | ␉␉␉ "write)\n");␊ |
| 288 | ␉}␊ |
| 289 | #endif␊ |
| 290 | ␉if (emu_chip == EMULATE_NONE) {␊ |
| 291 | ␉␉msg_perr("Invalid chip specified for emulation: %s\n", tmp);␊ |
| 292 | ␉␉free(tmp);␊ |
| 293 | ␉␉return 1;␊ |
| 294 | ␉}␊ |
| 295 | ␉free(tmp);␊ |
| 296 | ␉flashchip_contents = malloc(emu_chip_size);␊ |
| 297 | ␉if (!flashchip_contents) {␊ |
| 298 | ␉␉msg_perr("Out of memory!\n");␊ |
| 299 | ␉␉return 1;␊ |
| 300 | ␉}␊ |
| 301 | ␊ |
| 302 | ␉msg_pdbg("Filling fake flash chip with 0xff, size %i\n", emu_chip_size);␊ |
| 303 | ␉memset(flashchip_contents, 0xff, emu_chip_size);␊ |
| 304 | ␊ |
| 305 | ␉emu_persistent_image = extract_programmer_param("image");␊ |
| 306 | ␉if (!emu_persistent_image) {␊ |
| 307 | ␉␉/* Nothing else to do. */␊ |
| 308 | ␉␉goto dummy_init_out;␊ |
| 309 | ␉}␊ |
| 310 | ␉if (!stat(emu_persistent_image, &image_stat)) {␊ |
| 311 | ␉␉msg_pdbg("Found persistent image %s, size %li ",␊ |
| 312 | ␉␉␉ emu_persistent_image, (long)image_stat.st_size);␊ |
| 313 | ␉␉if (image_stat.st_size == emu_chip_size) {␊ |
| 314 | ␉␉␉msg_pdbg("matches.\n");␊ |
| 315 | ␉␉␉msg_pdbg("Reading %s\n", emu_persistent_image);␊ |
| 316 | ␉␉␉read_buf_from_file(flashchip_contents, emu_chip_size,␊ |
| 317 | ␉␉␉␉␉ emu_persistent_image);␊ |
| 318 | ␉␉} else {␊ |
| 319 | ␉␉␉msg_pdbg("doesn't match.\n");␊ |
| 320 | ␉␉}␊ |
| 321 | ␉}␊ |
| 322 | #endif␊ |
| 323 | ␊ |
| 324 | dummy_init_out:␊ |
| 325 | ␉if (register_shutdown(dummy_shutdown, NULL)) {␊ |
| 326 | ␉␉free(flashchip_contents);␊ |
| 327 | ␉␉return 1;␊ |
| 328 | ␉}␊ |
| 329 | ␉if (dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH))␊ |
| 330 | ␉␉register_par_programmer(&par_programmer_dummy,␊ |
| 331 | ␉␉␉␉␉dummy_buses_supported &␊ |
| 332 | ␉␉␉␉␉␉(BUS_PARALLEL | BUS_LPC |␊ |
| 333 | ␉␉␉␉␉␉ BUS_FWH));␊ |
| 334 | ␉if (dummy_buses_supported & BUS_SPI)␊ |
| 335 | ␉␉register_spi_programmer(&spi_programmer_dummyflasher);␊ |
| 336 | ␊ |
| 337 | ␉return 0;␊ |
| 338 | }␊ |
| 339 | ␊ |
| 340 | void *dummy_map(const char *descr, unsigned long phys_addr, size_t len)␊ |
| 341 | {␊ |
| 342 | ␉msg_pspew("%s: Mapping %s, 0x%lx bytes at 0x%08lx\n",␊ |
| 343 | ␉␉ __func__, descr, (unsigned long)len, phys_addr);␊ |
| 344 | ␉return (void *)phys_addr;␊ |
| 345 | }␊ |
| 346 | ␊ |
| 347 | void dummy_unmap(void *virt_addr, size_t len)␊ |
| 348 | {␊ |
| 349 | ␉msg_pspew("%s: Unmapping 0x%lx bytes at %p\n",␊ |
| 350 | ␉␉ __func__, (unsigned long)len, virt_addr);␊ |
| 351 | }␊ |
| 352 | ␊ |
| 353 | static void dummy_chip_writeb(const struct flashctx *flash, uint8_t val,␊ |
| 354 | ␉␉␉ chipaddr addr)␊ |
| 355 | {␊ |
| 356 | ␉msg_pspew("%s: addr=0x%lx, val=0x%02x\n", __func__, addr, val);␊ |
| 357 | }␊ |
| 358 | ␊ |
| 359 | static void dummy_chip_writew(const struct flashctx *flash, uint16_t val,␊ |
| 360 | ␉␉␉ chipaddr addr)␊ |
| 361 | {␊ |
| 362 | ␉msg_pspew("%s: addr=0x%lx, val=0x%04x\n", __func__, addr, val);␊ |
| 363 | }␊ |
| 364 | ␊ |
| 365 | static void dummy_chip_writel(const struct flashctx *flash, uint32_t val,␊ |
| 366 | ␉␉␉ chipaddr addr)␊ |
| 367 | {␊ |
| 368 | ␉msg_pspew("%s: addr=0x%lx, val=0x%08x\n", __func__, addr, val);␊ |
| 369 | }␊ |
| 370 | ␊ |
| 371 | static void dummy_chip_writen(const struct flashctx *flash, uint8_t *buf,␊ |
| 372 | ␉␉␉ chipaddr addr, size_t len)␊ |
| 373 | {␊ |
| 374 | ␉size_t i;␊ |
| 375 | ␉msg_pspew("%s: addr=0x%lx, len=0x%08lx, writing data (hex):",␊ |
| 376 | ␉␉ __func__, addr, (unsigned long)len);␊ |
| 377 | ␉for (i = 0; i < len; i++) {␊ |
| 378 | ␉␉if ((i % 16) == 0)␊ |
| 379 | ␉␉␉msg_pspew("\n");␊ |
| 380 | ␉␉msg_pspew("%02x ", buf[i]);␊ |
| 381 | ␉}␊ |
| 382 | }␊ |
| 383 | ␊ |
| 384 | static uint8_t dummy_chip_readb(const struct flashctx *flash,␊ |
| 385 | ␉␉␉␉const chipaddr addr)␊ |
| 386 | {␊ |
| 387 | ␉msg_pspew("%s: addr=0x%lx, returning 0xff\n", __func__, addr);␊ |
| 388 | ␉return 0xff;␊ |
| 389 | }␊ |
| 390 | ␊ |
| 391 | static uint16_t dummy_chip_readw(const struct flashctx *flash,␊ |
| 392 | ␉␉␉␉ const chipaddr addr)␊ |
| 393 | {␊ |
| 394 | ␉msg_pspew("%s: addr=0x%lx, returning 0xffff\n", __func__, addr);␊ |
| 395 | ␉return 0xffff;␊ |
| 396 | }␊ |
| 397 | ␊ |
| 398 | static uint32_t dummy_chip_readl(const struct flashctx *flash,␊ |
| 399 | ␉␉␉␉ const chipaddr addr)␊ |
| 400 | {␊ |
| 401 | ␉msg_pspew("%s: addr=0x%lx, returning 0xffffffff\n", __func__, addr);␊ |
| 402 | ␉return 0xffffffff;␊ |
| 403 | }␊ |
| 404 | ␊ |
| 405 | static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf,␊ |
| 406 | ␉␉␉ const chipaddr addr, size_t len)␊ |
| 407 | {␊ |
| 408 | ␉msg_pspew("%s: addr=0x%lx, len=0x%lx, returning array of 0xff\n",␊ |
| 409 | ␉␉ __func__, addr, (unsigned long)len);␊ |
| 410 | ␉memset(buf, 0xff, len);␊ |
| 411 | ␉return;␊ |
| 412 | }␊ |
| 413 | ␊ |
| 414 | #if EMULATE_SPI_CHIP␊ |
| 415 | static int emulate_spi_chip_response(unsigned int writecnt,␊ |
| 416 | ␉␉␉␉ unsigned int readcnt,␊ |
| 417 | ␉␉␉␉ const unsigned char *writearr,␊ |
| 418 | ␉␉␉␉ unsigned char *readarr)␊ |
| 419 | {␊ |
| 420 | ␉unsigned int offs, i;␊ |
| 421 | ␉static int unsigned aai_offs;␊ |
| 422 | ␉static int aai_active = 0;␊ |
| 423 | ␊ |
| 424 | ␉if (writecnt == 0) {␊ |
| 425 | ␉␉msg_perr("No command sent to the chip!\n");␊ |
| 426 | ␉␉return 1;␊ |
| 427 | ␉}␊ |
| 428 | ␉/* spi_blacklist has precedence before spi_ignorelist. */␊ |
| 429 | ␉for (i = 0; i < spi_blacklist_size; i++) {␊ |
| 430 | ␉␉if (writearr[0] == spi_blacklist[i]) {␊ |
| 431 | ␉␉␉msg_pdbg("Refusing blacklisted SPI command 0x%02x\n",␊ |
| 432 | ␉␉␉␉ spi_blacklist[i]);␊ |
| 433 | ␉␉␉return SPI_INVALID_OPCODE;␊ |
| 434 | ␉␉}␊ |
| 435 | ␉}␊ |
| 436 | ␉for (i = 0; i < spi_ignorelist_size; i++) {␊ |
| 437 | ␉␉if (writearr[0] == spi_ignorelist[i]) {␊ |
| 438 | ␉␉␉msg_cdbg("Ignoring ignorelisted SPI command 0x%02x\n",␊ |
| 439 | ␉␉␉␉ spi_ignorelist[i]);␊ |
| 440 | ␉␉␉/* Return success because the command does not fail,␊ |
| 441 | ␉␉␉ * it is simply ignored.␊ |
| 442 | ␉␉␉ */␊ |
| 443 | ␉␉␉return 0;␊ |
| 444 | ␉␉}␊ |
| 445 | ␉}␊ |
| 446 | ␉switch (writearr[0]) {␊ |
| 447 | ␉case JEDEC_RES:␊ |
| 448 | ␉␉if (emu_chip != EMULATE_ST_M25P10_RES)␊ |
| 449 | ␉␉␉break;␊ |
| 450 | ␉␉/* Respond with ST_M25P10_RES. */␊ |
| 451 | ␉␉if (readcnt > 0)␊ |
| 452 | ␉␉␉readarr[0] = 0x10;␊ |
| 453 | ␉␉break;␊ |
| 454 | ␉case JEDEC_REMS:␊ |
| 455 | ␉␉if (emu_chip != EMULATE_SST_SST25VF040_REMS)␊ |
| 456 | ␉␉␉break;␊ |
| 457 | ␉␉/* Respond with SST_SST25VF040_REMS. */␊ |
| 458 | ␉␉if (readcnt > 0)␊ |
| 459 | ␉␉␉readarr[0] = 0xbf;␊ |
| 460 | ␉␉if (readcnt > 1)␊ |
| 461 | ␉␉␉readarr[1] = 0x44;␊ |
| 462 | ␉␉break;␊ |
| 463 | ␉case JEDEC_RDID:␊ |
| 464 | ␉␉if (emu_chip != EMULATE_SST_SST25VF032B)␊ |
| 465 | ␉␉␉break;␊ |
| 466 | ␉␉/* Respond with SST_SST25VF032B. */␊ |
| 467 | ␉␉if (readcnt > 0)␊ |
| 468 | ␉␉␉readarr[0] = 0xbf;␊ |
| 469 | ␉␉if (readcnt > 1)␊ |
| 470 | ␉␉␉readarr[1] = 0x25;␊ |
| 471 | ␉␉if (readcnt > 2)␊ |
| 472 | ␉␉␉readarr[2] = 0x4a;␊ |
| 473 | ␉␉break;␊ |
| 474 | ␉case JEDEC_RDSR:␊ |
| 475 | ␉␉memset(readarr, 0, readcnt);␊ |
| 476 | ␉␉if (aai_active)␊ |
| 477 | ␉␉␉memset(readarr, 1 << 6, readcnt);␊ |
| 478 | ␉␉break;␊ |
| 479 | ␉case JEDEC_READ:␊ |
| 480 | ␉␉offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];␊ |
| 481 | ␉␉/* Truncate to emu_chip_size. */␊ |
| 482 | ␉␉offs %= emu_chip_size;␊ |
| 483 | ␉␉if (readcnt > 0)␊ |
| 484 | ␉␉␉memcpy(readarr, flashchip_contents + offs, readcnt);␊ |
| 485 | ␉␉break;␊ |
| 486 | ␉case JEDEC_BYTE_PROGRAM:␊ |
| 487 | ␉␉offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];␊ |
| 488 | ␉␉/* Truncate to emu_chip_size. */␊ |
| 489 | ␉␉offs %= emu_chip_size;␊ |
| 490 | ␉␉if (writecnt < 5) {␊ |
| 491 | ␉␉␉msg_perr("BYTE PROGRAM size too short!\n");␊ |
| 492 | ␉␉␉return 1;␊ |
| 493 | ␉␉}␊ |
| 494 | ␉␉if (writecnt - 4 > emu_max_byteprogram_size) {␊ |
| 495 | ␉␉␉msg_perr("Max BYTE PROGRAM size exceeded!\n");␊ |
| 496 | ␉␉␉return 1;␊ |
| 497 | ␉␉}␊ |
| 498 | ␉␉memcpy(flashchip_contents + offs, writearr + 4, writecnt - 4);␊ |
| 499 | ␉␉break;␊ |
| 500 | ␉case JEDEC_AAI_WORD_PROGRAM:␊ |
| 501 | ␉␉if (!emu_max_aai_size)␊ |
| 502 | ␉␉␉break;␊ |
| 503 | ␉␉if (!aai_active) {␊ |
| 504 | ␉␉␉if (writecnt < JEDEC_AAI_WORD_PROGRAM_OUTSIZE) {␊ |
| 505 | ␉␉␉␉msg_perr("Initial AAI WORD PROGRAM size too "␊ |
| 506 | ␉␉␉␉␉ "short!\n");␊ |
| 507 | ␉␉␉␉return 1;␊ |
| 508 | ␉␉␉}␊ |
| 509 | ␉␉␉if (writecnt > JEDEC_AAI_WORD_PROGRAM_OUTSIZE) {␊ |
| 510 | ␉␉␉␉msg_perr("Initial AAI WORD PROGRAM size too "␊ |
| 511 | ␉␉␉␉␉ "long!\n");␊ |
| 512 | ␉␉␉␉return 1;␊ |
| 513 | ␉␉␉}␊ |
| 514 | ␉␉␉aai_active = 1;␊ |
| 515 | ␉␉␉aai_offs = writearr[1] << 16 | writearr[2] << 8 |␊ |
| 516 | ␉␉␉␉ writearr[3];␊ |
| 517 | ␉␉␉/* Truncate to emu_chip_size. */␊ |
| 518 | ␉␉␉aai_offs %= emu_chip_size;␊ |
| 519 | ␉␉␉memcpy(flashchip_contents + aai_offs, writearr + 4, 2);␊ |
| 520 | ␉␉␉aai_offs += 2;␊ |
| 521 | ␉␉} else {␊ |
| 522 | ␉␉␉if (writecnt < JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) {␊ |
| 523 | ␉␉␉␉msg_perr("Continuation AAI WORD PROGRAM size "␊ |
| 524 | ␉␉␉␉␉ "too short!\n");␊ |
| 525 | ␉␉␉␉return 1;␊ |
| 526 | ␉␉␉}␊ |
| 527 | ␉␉␉if (writecnt > JEDEC_AAI_WORD_PROGRAM_CONT_OUTSIZE) {␊ |
| 528 | ␉␉␉␉msg_perr("Continuation AAI WORD PROGRAM size "␊ |
| 529 | ␉␉␉␉␉ "too long!\n");␊ |
| 530 | ␉␉␉␉return 1;␊ |
| 531 | ␉␉␉}␊ |
| 532 | ␉␉␉memcpy(flashchip_contents + aai_offs, writearr + 1, 2);␊ |
| 533 | ␉␉␉aai_offs += 2;␊ |
| 534 | ␉␉}␊ |
| 535 | ␉␉break;␊ |
| 536 | ␉case JEDEC_WRDI:␊ |
| 537 | ␉␉if (!emu_max_aai_size)␊ |
| 538 | ␉␉␉break;␊ |
| 539 | ␉␉aai_active = 0;␊ |
| 540 | ␉␉break;␊ |
| 541 | ␉case JEDEC_SE:␊ |
| 542 | ␉␉if (!emu_jedec_se_size)␊ |
| 543 | ␉␉␉break;␊ |
| 544 | ␉␉if (writecnt != JEDEC_SE_OUTSIZE) {␊ |
| 545 | ␉␉␉msg_perr("SECTOR ERASE 0x20 outsize invalid!\n");␊ |
| 546 | ␉␉␉return 1;␊ |
| 547 | ␉␉}␊ |
| 548 | ␉␉if (readcnt != JEDEC_SE_INSIZE) {␊ |
| 549 | ␉␉␉msg_perr("SECTOR ERASE 0x20 insize invalid!\n");␊ |
| 550 | ␉␉␉return 1;␊ |
| 551 | ␉␉}␊ |
| 552 | ␉␉offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];␊ |
| 553 | ␉␉if (offs & (emu_jedec_se_size - 1))␊ |
| 554 | ␉␉␉msg_pdbg("Unaligned SECTOR ERASE 0x20: 0x%x\n", offs);␊ |
| 555 | ␉␉offs &= ~(emu_jedec_se_size - 1);␊ |
| 556 | ␉␉memset(flashchip_contents + offs, 0xff, emu_jedec_se_size);␊ |
| 557 | ␉␉break;␊ |
| 558 | ␉case JEDEC_BE_52:␊ |
| 559 | ␉␉if (!emu_jedec_be_52_size)␊ |
| 560 | ␉␉␉break;␊ |
| 561 | ␉␉if (writecnt != JEDEC_BE_52_OUTSIZE) {␊ |
| 562 | ␉␉␉msg_perr("BLOCK ERASE 0x52 outsize invalid!\n");␊ |
| 563 | ␉␉␉return 1;␊ |
| 564 | ␉␉}␊ |
| 565 | ␉␉if (readcnt != JEDEC_BE_52_INSIZE) {␊ |
| 566 | ␉␉␉msg_perr("BLOCK ERASE 0x52 insize invalid!\n");␊ |
| 567 | ␉␉␉return 1;␊ |
| 568 | ␉␉}␊ |
| 569 | ␉␉offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];␊ |
| 570 | ␉␉if (offs & (emu_jedec_be_52_size - 1))␊ |
| 571 | ␉␉␉msg_pdbg("Unaligned BLOCK ERASE 0x52: 0x%x\n", offs);␊ |
| 572 | ␉␉offs &= ~(emu_jedec_be_52_size - 1);␊ |
| 573 | ␉␉memset(flashchip_contents + offs, 0xff, emu_jedec_be_52_size);␊ |
| 574 | ␉␉break;␊ |
| 575 | ␉case JEDEC_BE_D8:␊ |
| 576 | ␉␉if (!emu_jedec_be_d8_size)␊ |
| 577 | ␉␉␉break;␊ |
| 578 | ␉␉if (writecnt != JEDEC_BE_D8_OUTSIZE) {␊ |
| 579 | ␉␉␉msg_perr("BLOCK ERASE 0xd8 outsize invalid!\n");␊ |
| 580 | ␉␉␉return 1;␊ |
| 581 | ␉␉}␊ |
| 582 | ␉␉if (readcnt != JEDEC_BE_D8_INSIZE) {␊ |
| 583 | ␉␉␉msg_perr("BLOCK ERASE 0xd8 insize invalid!\n");␊ |
| 584 | ␉␉␉return 1;␊ |
| 585 | ␉␉}␊ |
| 586 | ␉␉offs = writearr[1] << 16 | writearr[2] << 8 | writearr[3];␊ |
| 587 | ␉␉if (offs & (emu_jedec_be_d8_size - 1))␊ |
| 588 | ␉␉␉msg_pdbg("Unaligned BLOCK ERASE 0xd8: 0x%x\n", offs);␊ |
| 589 | ␉␉offs &= ~(emu_jedec_be_d8_size - 1);␊ |
| 590 | ␉␉memset(flashchip_contents + offs, 0xff, emu_jedec_be_d8_size);␊ |
| 591 | ␉␉break;␊ |
| 592 | ␉case JEDEC_CE_60:␊ |
| 593 | ␉␉if (!emu_jedec_ce_60_size)␊ |
| 594 | ␉␉␉break;␊ |
| 595 | ␉␉if (writecnt != JEDEC_CE_60_OUTSIZE) {␊ |
| 596 | ␉␉␉msg_perr("CHIP ERASE 0x60 outsize invalid!\n");␊ |
| 597 | ␉␉␉return 1;␊ |
| 598 | ␉␉}␊ |
| 599 | ␉␉if (readcnt != JEDEC_CE_60_INSIZE) {␊ |
| 600 | ␉␉␉msg_perr("CHIP ERASE 0x60 insize invalid!\n");␊ |
| 601 | ␉␉␉return 1;␊ |
| 602 | ␉␉}␊ |
| 603 | ␉␉/* JEDEC_CE_60_OUTSIZE is 1 (no address) -> no offset. */␊ |
| 604 | ␉␉/* emu_jedec_ce_60_size is emu_chip_size. */␊ |
| 605 | ␉␉memset(flashchip_contents, 0xff, emu_jedec_ce_60_size);␊ |
| 606 | ␉␉break;␊ |
| 607 | ␉case JEDEC_CE_C7:␊ |
| 608 | ␉␉if (!emu_jedec_ce_c7_size)␊ |
| 609 | ␉␉␉break;␊ |
| 610 | ␉␉if (writecnt != JEDEC_CE_C7_OUTSIZE) {␊ |
| 611 | ␉␉␉msg_perr("CHIP ERASE 0xc7 outsize invalid!\n");␊ |
| 612 | ␉␉␉return 1;␊ |
| 613 | ␉␉}␊ |
| 614 | ␉␉if (readcnt != JEDEC_CE_C7_INSIZE) {␊ |
| 615 | ␉␉␉msg_perr("CHIP ERASE 0xc7 insize invalid!\n");␊ |
| 616 | ␉␉␉return 1;␊ |
| 617 | ␉␉}␊ |
| 618 | ␉␉/* JEDEC_CE_C7_OUTSIZE is 1 (no address) -> no offset. */␊ |
| 619 | ␉␉/* emu_jedec_ce_c7_size is emu_chip_size. */␊ |
| 620 | ␉␉memset(flashchip_contents, 0xff, emu_jedec_ce_c7_size);␊ |
| 621 | ␉␉break;␊ |
| 622 | ␉default:␊ |
| 623 | ␉␉/* No special response. */␊ |
| 624 | ␉␉break;␊ |
| 625 | ␉}␊ |
| 626 | ␉return 0;␊ |
| 627 | }␊ |
| 628 | #endif␊ |
| 629 | ␊ |
| 630 | static int dummy_spi_send_command(struct flashctx *flash, unsigned int writecnt,␊ |
| 631 | ␉␉␉␉ unsigned int readcnt,␊ |
| 632 | ␉␉␉␉ const unsigned char *writearr,␊ |
| 633 | ␉␉␉␉ unsigned char *readarr)␊ |
| 634 | {␊ |
| 635 | ␉int i;␊ |
| 636 | ␊ |
| 637 | ␉msg_pspew("%s:", __func__);␊ |
| 638 | ␊ |
| 639 | ␉msg_pspew(" writing %u bytes:", writecnt);␊ |
| 640 | ␉for (i = 0; i < writecnt; i++)␊ |
| 641 | ␉␉msg_pspew(" 0x%02x", writearr[i]);␊ |
| 642 | ␊ |
| 643 | ␉/* Response for unknown commands and missing chip is 0xff. */␊ |
| 644 | ␉memset(readarr, 0xff, readcnt);␊ |
| 645 | #if EMULATE_SPI_CHIP␊ |
| 646 | ␉switch (emu_chip) {␊ |
| 647 | ␉case EMULATE_ST_M25P10_RES:␊ |
| 648 | ␉case EMULATE_SST_SST25VF040_REMS:␊ |
| 649 | ␉case EMULATE_SST_SST25VF032B:␊ |
| 650 | ␉␉if (emulate_spi_chip_response(writecnt, readcnt, writearr,␊ |
| 651 | ␉␉␉␉␉ readarr)) {␊ |
| 652 | ␉␉␉msg_pdbg("Invalid command sent to flash chip!\n");␊ |
| 653 | ␉␉␉return 1;␊ |
| 654 | ␉␉}␊ |
| 655 | ␉␉break;␊ |
| 656 | ␉default:␊ |
| 657 | ␉␉break;␊ |
| 658 | ␉}␊ |
| 659 | #endif␊ |
| 660 | ␉msg_pspew(" reading %u bytes:", readcnt);␊ |
| 661 | ␉for (i = 0; i < readcnt; i++)␊ |
| 662 | ␉␉msg_pspew(" 0x%02x", readarr[i]);␊ |
| 663 | ␉msg_pspew("\n");␊ |
| 664 | ␉return 0;␊ |
| 665 | }␊ |
| 666 | ␊ |
| 667 | static int dummy_spi_write_256(struct flashctx *flash, uint8_t *buf,␊ |
| 668 | ␉␉␉ unsigned int start, unsigned int len)␊ |
| 669 | {␊ |
| 670 | ␉return spi_write_chunked(flash, buf, start, len,␊ |
| 671 | ␉␉␉␉ spi_write_256_chunksize);␊ |
| 672 | }␊ |
| 673 | |