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Root/trunk/bitbang_spi.c

1/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include <stdio.h>
21#include <string.h>
22#include <stdlib.h>
23#include <ctype.h>
24#include "flash.h"
25#include "programmer.h"
26#include "spi.h"
27
28/* Note that CS# is active low, so val=0 means the chip is active. */
29static void bitbang_spi_set_cs(const const struct bitbang_spi_master *master, int val)
30{
31master->set_cs(val);
32}
33
34static void bitbang_spi_set_sck(const const struct bitbang_spi_master *master, int val)
35{
36master->set_sck(val);
37}
38
39static void bitbang_spi_set_mosi(const const struct bitbang_spi_master *master, int val)
40{
41master->set_mosi(val);
42}
43
44static int bitbang_spi_get_miso(const const struct bitbang_spi_master *master)
45{
46return master->get_miso();
47}
48
49static void bitbang_spi_request_bus(const const struct bitbang_spi_master *master)
50{
51if (master->request_bus)
52master->request_bus();
53}
54
55static void bitbang_spi_release_bus(const const struct bitbang_spi_master *master)
56{
57if (master->release_bus)
58master->release_bus();
59}
60
61static int bitbang_spi_send_command(struct flashctx *flash,
62 unsigned int writecnt, unsigned int readcnt,
63 const unsigned char *writearr,
64 unsigned char *readarr);
65
66static const struct spi_programmer spi_programmer_bitbang = {
67.type= SPI_CONTROLLER_BITBANG,
68.max_data_read= MAX_DATA_READ_UNLIMITED,
69.max_data_write= MAX_DATA_WRITE_UNLIMITED,
70.command= bitbang_spi_send_command,
71.multicommand= default_spi_send_multicommand,
72.read= default_spi_read,
73.write_256= default_spi_write_256,
74};
75
76#if 0 // until it is needed
77static int bitbang_spi_shutdown(const struct bitbang_spi_master *master)
78{
79/* FIXME: Run bitbang_spi_release_bus here or per command? */
80return 0;
81}
82#endif
83
84int bitbang_spi_init(const struct bitbang_spi_master *master)
85{
86struct spi_programmer pgm = spi_programmer_bitbang;
87/* BITBANG_SPI_INVALID is 0, so if someone forgot to initialize ->type,
88 * we catch it here. Same goes for missing initialization of bitbanging
89 * functions.
90 */
91if (!master || master->type == BITBANG_SPI_INVALID || !master->set_cs ||
92 !master->set_sck || !master->set_mosi || !master->get_miso ||
93 (master->request_bus && !master->release_bus) ||
94 (!master->request_bus && master->release_bus)) {
95msg_perr("Incomplete SPI bitbang master setting!\n"
96 "Please report a bug at flashrom@flashrom.org\n");
97return ERROR_FLASHROM_BUG;
98}
99
100pgm.data = master;
101register_spi_programmer(&pgm);
102
103/* Only mess with the bus if we're sure nobody else uses it. */
104bitbang_spi_request_bus(master);
105bitbang_spi_set_cs(master, 1);
106bitbang_spi_set_sck(master, 0);
107bitbang_spi_set_mosi(master, 0);
108/* FIXME: Release SPI bus here and request it again for each command or
109 * don't release it now and only release it on programmer shutdown?
110 */
111bitbang_spi_release_bus(master);
112return 0;
113}
114
115static uint8_t bitbang_spi_rw_byte(const struct bitbang_spi_master *master,
116 uint8_t val)
117{
118uint8_t ret = 0;
119int i;
120
121for (i = 7; i >= 0; i--) {
122bitbang_spi_set_mosi(master, (val >> i) & 1);
123programmer_delay(master->half_period);
124bitbang_spi_set_sck(master, 1);
125ret <<= 1;
126ret |= bitbang_spi_get_miso(master);
127programmer_delay(master->half_period);
128bitbang_spi_set_sck(master, 0);
129}
130return ret;
131}
132
133static int bitbang_spi_send_command(struct flashctx *flash,
134 unsigned int writecnt, unsigned int readcnt,
135 const unsigned char *writearr,
136 unsigned char *readarr)
137{
138int i;
139const struct bitbang_spi_master *master = flash->pgm->spi.data;
140
141/* FIXME: Run bitbang_spi_request_bus here or in programmer init?
142 * Requesting and releasing the SPI bus is handled in here to allow the
143 * programmer to use its own SPI engine for native accesses.
144 */
145bitbang_spi_request_bus(master);
146bitbang_spi_set_cs(master, 0);
147for (i = 0; i < writecnt; i++)
148bitbang_spi_rw_byte(master, writearr[i]);
149for (i = 0; i < readcnt; i++)
150readarr[i] = bitbang_spi_rw_byte(master, 0);
151
152programmer_delay(master->half_period);
153bitbang_spi_set_cs(master, 1);
154programmer_delay(master->half_period);
155/* FIXME: Run bitbang_spi_release_bus here or in programmer init? */
156bitbang_spi_release_bus(master);
157
158return 0;
159}
160

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