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Root/trunk/at25.c

1/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2010 Carl-Daniel Hailfinger
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
18 */
19
20#include "flash.h"
21#include "chipdrivers.h"
22#include "spi.h"
23
24/* Prettyprint the status register. Works for Atmel A25/A26 series. */
25
26static void spi_prettyprint_status_register_atmel_at25_srpl(uint8_t status)
27{
28msg_cdbg("Chip status register: Sector Protection Register Lock (SRPL) "
29 "is %sset\n", (status & (1 << 7)) ? "" : "not ");
30}
31
32static void spi_prettyprint_status_register_atmel_at25_epewpp(uint8_t status)
33{
34msg_cdbg("Chip status register: Erase/Program Error (EPE) "
35 "is %sset\n", (status & (1 << 5)) ? "" : "not ");
36msg_cdbg("Chip status register: WP# pin (WPP) "
37 "is %sasserted\n", (status & (1 << 4)) ? "not " : "");
38}
39
40static void spi_prettyprint_status_register_atmel_at25_swp(uint8_t status)
41{
42msg_cdbg("Chip status register: Software Protection Status (SWP): ");
43switch (status & (3 << 2)) {
44case 0x0 << 2:
45msg_cdbg("no sectors are protected\n");
46break;
47case 0x1 << 2:
48msg_cdbg("some sectors are protected\n");
49/* FIXME: Read individual Sector Protection Registers. */
50break;
51case 0x3 << 2:
52msg_cdbg("all sectors are protected\n");
53break;
54default:
55msg_cdbg("reserved for future use\n");
56break;
57}
58}
59
60int spi_prettyprint_status_register_at25df(struct flashctx *flash)
61{
62uint8_t status;
63
64status = spi_read_status_register(flash);
65msg_cdbg("Chip status register is %02x\n", status);
66
67spi_prettyprint_status_register_atmel_at25_srpl(status);
68spi_prettyprint_status_register_bit(status, 6);
69spi_prettyprint_status_register_atmel_at25_epewpp(status);
70spi_prettyprint_status_register_atmel_at25_swp(status);
71spi_prettyprint_status_register_welwip(status);
72return 0;
73}
74
75int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash)
76{
77/* FIXME: We should check the security lockdown. */
78msg_cdbg("Ignoring security lockdown (if present)\n");
79msg_cdbg("Ignoring status register byte 2\n");
80return spi_prettyprint_status_register_at25df(flash);
81}
82
83int spi_prettyprint_status_register_at25f(struct flashctx *flash)
84{
85uint8_t status;
86
87status = spi_read_status_register(flash);
88msg_cdbg("Chip status register is %02x\n", status);
89
90spi_prettyprint_status_register_atmel_at25_srpl(status);
91spi_prettyprint_status_register_bit(status, 6);
92spi_prettyprint_status_register_atmel_at25_epewpp(status);
93spi_prettyprint_status_register_bit(status, 3);
94msg_cdbg("Chip status register: Block Protect 0 (BP0) is "
95 "%sset, %s sectors are protected\n",
96 (status & (1 << 2)) ? "" : "not ",
97 (status & (1 << 2)) ? "all" : "no");
98spi_prettyprint_status_register_welwip(status);
99return 0;
100}
101
102int spi_prettyprint_status_register_at25fs010(struct flashctx *flash)
103{
104uint8_t status;
105
106status = spi_read_status_register(flash);
107msg_cdbg("Chip status register is %02x\n", status);
108
109msg_cdbg("Chip status register: Status Register Write Protect (WPEN) "
110 "is %sset\n", (status & (1 << 7)) ? "" : "not ");
111msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is "
112 "%sset\n", (status & (1 << 6)) ? "" : "not ");
113msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
114 "%sset\n", (status & (1 << 5)) ? "" : "not ");
115msg_cdbg("Chip status register: Bit 4 is "
116 "%sset\n", (status & (1 << 4)) ? "" : "not ");
117msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is "
118 "%sset\n", (status & (1 << 3)) ? "" : "not ");
119msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
120 "%sset\n", (status & (1 << 2)) ? "" : "not ");
121/* FIXME: Pretty-print detailed sector protection status. */
122spi_prettyprint_status_register_welwip(status);
123return 0;
124}
125
126int spi_prettyprint_status_register_at25fs040(struct flashctx *flash)
127{
128uint8_t status;
129
130status = spi_read_status_register(flash);
131msg_cdbg("Chip status register is %02x\n", status);
132
133msg_cdbg("Chip status register: Status Register Write Protect (WPEN) "
134 "is %sset\n", (status & (1 << 7)) ? "" : "not ");
135msg_cdbg("Chip status register: Bit 6 / Block Protect 4 (BP4) is "
136 "%sset\n", (status & (1 << 6)) ? "" : "not ");
137msg_cdbg("Chip status register: Bit 5 / Block Protect 3 (BP3) is "
138 "%sset\n", (status & (1 << 5)) ? "" : "not ");
139msg_cdbg("Chip status register: Bit 4 / Block Protect 2 (BP2) is "
140 "%sset\n", (status & (1 << 4)) ? "" : "not ");
141msg_cdbg("Chip status register: Bit 3 / Block Protect 1 (BP1) is "
142 "%sset\n", (status & (1 << 3)) ? "" : "not ");
143msg_cdbg("Chip status register: Bit 2 / Block Protect 0 (BP0) is "
144 "%sset\n", (status & (1 << 2)) ? "" : "not ");
145/* FIXME: Pretty-print detailed sector protection status. */
146spi_prettyprint_status_register_welwip(status);
147return 0;
148}
149
150int spi_prettyprint_status_register_atmel_at26df081a(struct flashctx *flash)
151{
152uint8_t status;
153
154status = spi_read_status_register(flash);
155msg_cdbg("Chip status register is %02x\n", status);
156
157spi_prettyprint_status_register_atmel_at25_srpl(status);
158msg_cdbg("Chip status register: Sequential Program Mode Status (SPM) "
159 "is %sset\n", (status & (1 << 6)) ? "" : "not ");
160spi_prettyprint_status_register_atmel_at25_epewpp(status);
161spi_prettyprint_status_register_atmel_at25_swp(status);
162spi_prettyprint_status_register_welwip(status);
163return 0;
164}
165
166int spi_disable_blockprotect_at25df(struct flashctx *flash)
167{
168uint8_t status;
169int result;
170
171status = spi_read_status_register(flash);
172/* If block protection is disabled, stop here. */
173if ((status & (3 << 2)) == 0)
174return 0;
175
176msg_cdbg("Some block protection in effect, disabling\n");
177if (status & (1 << 7)) {
178msg_cdbg("Need to disable Sector Protection Register Lock\n");
179if ((status & (1 << 4)) == 0) {
180msg_cerr("WP# pin is active, disabling "
181 "write protection is impossible.\n");
182return 1;
183}
184/* All bits except bit 7 (SPRL) are readonly. */
185result = spi_write_status_register(flash, status & ~(1 << 7));
186if (result) {
187msg_cerr("spi_write_status_register failed\n");
188return result;
189}
190
191}
192/* Global unprotect. Make sure to mask SPRL as well. */
193result = spi_write_status_register(flash, status & ~0xbc);
194if (result) {
195msg_cerr("spi_write_status_register failed\n");
196return result;
197}
198status = spi_read_status_register(flash);
199if ((status & (3 << 2)) != 0) {
200msg_cerr("Block protection could not be disabled!\n");
201return 1;
202}
203return 0;
204}
205
206int spi_disable_blockprotect_at25df_sec(struct flashctx *flash)
207{
208/* FIXME: We should check the security lockdown. */
209msg_cinfo("Ignoring security lockdown (if present)\n");
210return spi_disable_blockprotect_at25df(flash);
211}
212
213int spi_disable_blockprotect_at25f(struct flashctx *flash)
214{
215/* spi_disable_blockprotect_at25df is not really the right way to do
216 * this, but the side effects of said function work here as well.
217 */
218return spi_disable_blockprotect_at25df(flash);
219}
220
221int spi_disable_blockprotect_at25fs010(struct flashctx *flash)
222{
223uint8_t status;
224int result;
225
226status = spi_read_status_register(flash);
227/* If block protection is disabled, stop here. */
228if ((status & 0x6c) == 0)
229return 0;
230
231msg_cdbg("Some block protection in effect, disabling\n");
232if (status & (1 << 7)) {
233msg_cdbg("Need to disable Status Register Write Protect\n");
234/* Clear bit 7 (WPEN). */
235result = spi_write_status_register(flash, status & ~(1 << 7));
236if (result) {
237msg_cerr("spi_write_status_register failed\n");
238return result;
239}
240}
241/* Global unprotect. Make sure to mask WPEN as well. */
242result = spi_write_status_register(flash, status & ~0xec);
243if (result) {
244msg_cerr("spi_write_status_register failed\n");
245return result;
246}
247status = spi_read_status_register(flash);
248if ((status & 0x6c) != 0) {
249msg_cerr("Block protection could not be disabled!\n");
250return 1;
251}
252return 0;
253}
254
255int spi_disable_blockprotect_at25fs040(struct flashctx *flash)
256{
257uint8_t status;
258int result;
259
260status = spi_read_status_register(flash);
261/* If block protection is disabled, stop here. */
262if ((status & 0x7c) == 0)
263return 0;
264
265msg_cdbg("Some block protection in effect, disabling\n");
266if (status & (1 << 7)) {
267msg_cdbg("Need to disable Status Register Write Protect\n");
268/* Clear bit 7 (WPEN). */
269result = spi_write_status_register(flash, status & ~(1 << 7));
270if (result) {
271msg_cerr("spi_write_status_register failed\n");
272return result;
273}
274}
275/* Global unprotect. Make sure to mask WPEN as well. */
276result = spi_write_status_register(flash, status & ~0xfc);
277if (result) {
278msg_cerr("spi_write_status_register failed\n");
279return result;
280}
281status = spi_read_status_register(flash);
282if ((status & 0x7c) != 0) {
283msg_cerr("Block protection could not be disabled!\n");
284return 1;
285}
286return 0;
287}
288

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